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authorBen Dooks <ben-linux@fluff.org>2007-05-28 18:19:16 +0100
committerRussell King <rmk+kernel@arm.linux.org.uk>2007-05-30 13:15:23 +0100
commiteca8c2424171b6b6b2dcb0faa92dfddd1e3297d9 (patch)
tree680afa1b68832a4a81f07d706e4249a0f4290afa /include/asm-arm/arch-s3c2410
parent486cab2ba25b469f7a8822e84fd43960a472e3d9 (diff)
downloadop-kernel-dev-eca8c2424171b6b6b2dcb0faa92dfddd1e3297d9.zip
op-kernel-dev-eca8c2424171b6b6b2dcb0faa92dfddd1e3297d9.tar.gz
[ARM] 4412/1: S3C2412: reset errata fix
The S3C2412 has an reset-errata where the clock may cause a glitch switching back to EXTCLK. We force a switch to EXTCLK before writing the reset register to force use of the CLKCON sync logic to properly switch. Fix problem reported by Matthieu Castet. Signed-off-by: Ben Dooks <ben-linux@fluff.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'include/asm-arm/arch-s3c2410')
-rw-r--r--include/asm-arm/arch-s3c2410/regs-s3c2412.h21
1 files changed, 21 insertions, 0 deletions
diff --git a/include/asm-arm/arch-s3c2410/regs-s3c2412.h b/include/asm-arm/arch-s3c2410/regs-s3c2412.h
new file mode 100644
index 0000000..8ca6a3b
--- /dev/null
+++ b/include/asm-arm/arch-s3c2410/regs-s3c2412.h
@@ -0,0 +1,21 @@
+/* linux/include/asm-arm/arch-s3c2410/regs-s3c2412.h
+ *
+ * Copyright 2007 Simtec Electronics
+ * http://armlinux.simtec.co.uk/
+ * Ben Dooks <ben@simtec.co.uk>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * S3C2412 specific register definitions
+*/
+
+#ifndef __ASM_ARCH_REGS_S3C2412_H
+#define __ASM_ARCH_REGS_S3C2412_H "s3c2412"
+
+#define S3C2412_SWRST (S3C24XX_VA_CLKPWR + 0x30)
+#define S3C2412_SWRST_RESET (0x533C2412)
+
+#endif /* __ASM_ARCH_REGS_S3C2412_H */
+
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