diff options
author | eric miao <eric.miao@marvell.com> | 2008-01-28 23:00:02 +0000 |
---|---|---|
committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2008-02-04 13:17:33 +0000 |
commit | c4d1fb627ff307256d792280efcb09e1235affea (patch) | |
tree | 260ed71dd94883353de1e9256d3d7337d0a7b81a /include/asm-arm/arch-pxa | |
parent | 16dfdbf038706c12c56f327d14c6b901edc376a3 (diff) | |
download | op-kernel-dev-c4d1fb627ff307256d792280efcb09e1235affea.zip op-kernel-dev-c4d1fb627ff307256d792280efcb09e1235affea.tar.gz |
[ARM] pxa: add preliminary suspend/resume code for pxa3xx
1. clear RDH bit after resuming back from D3, otherwise, the multi function
pins will retain the low power state
2. save/restore essential system registers
Signed-off-by: eric miao <eric.miao@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'include/asm-arm/arch-pxa')
-rw-r--r-- | include/asm-arm/arch-pxa/pxa3xx-regs.h | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/include/asm-arm/arch-pxa/pxa3xx-regs.h b/include/asm-arm/arch-pxa/pxa3xx-regs.h index 66d5411..8e1b3ea 100644 --- a/include/asm-arm/arch-pxa/pxa3xx-regs.h +++ b/include/asm-arm/arch-pxa/pxa3xx-regs.h @@ -12,6 +12,19 @@ #ifndef __ASM_ARCH_PXA3XX_REGS_H #define __ASM_ARCH_PXA3XX_REGS_H +/* + * Service Power Management Unit (MPMU) + */ +#define PMCR __REG(0x40F50000) /* Power Manager Control Register */ +#define PSR __REG(0x40F50004) /* Power Manager S2 Status Register */ +#define PSPR __REG(0x40F50008) /* Power Manager Scratch Pad Register */ +#define PCFR __REG(0x40F5000C) /* Power Manager General Configuration Register */ +#define PWER __REG(0x40F50010) /* Power Manager Wake-up Enable Register */ +#define PWSR __REG(0x40F50014) /* Power Manager Wake-up Status Register */ +#define PECR __REG(0x40F50018) /* Power Manager EXT_WAKEUP[1:0] Control Register */ +#define DCDCSR __REG(0x40F50080) /* DC-DC Controller Status Register */ +#define PVCR __REG(0x40F50100) /* Power Manager Voltage Change Control Register */ +#define PCMD(x) __REG(0x40F50110 + ((x) << 2)) /* * Slave Power Managment Unit |