[ARM] 3064/1: start using ixp2000_reg_wrb

Patch from Lennert Buytenhek

Switch the users of ixp2000_reg_write that depend on writes being
flushed out of the write buffer by the time that function returns
over to ixp2000_reg_wrb.

When using XCB=101, writes to the same functional unit are still
guaranteed to complete in order, so we only need to protect against:
- reordering of writes to different functional units
- masking an interrupt and then reenabling the IRQ bit in CPSR

Signed-off-by: Lennert Buytenhek <buytenh@wantstofly.org>
Signed-off-by: Deepak Saxena <dsaxena@plexity.net>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

1 files changed, 9 insertions, 8 deletions

diff --git a/include/asm-arm/arch-ixp2000/system.h b/include/asm-arm/arch-ixp2000/system.h
index d9d6d9d..ddbbb34 100644
--- a/include/asm-arm/arch-ixp2000/system.h
+++ b/include/asm-arm/arch-ixp2000/system.h
@@ -26,23 +26,24 @@ static inline void arch_reset(char mode)
 	 * RedBoot bank.
 	 */
 	if (machine_is_ixdp2401()) {
-		*IXDP2X01_CPLD_FLASH_REG = ((0 >> IXDP2X01_FLASH_WINDOW_BITS)
-						| IXDP2X01_CPLD_FLASH_INTERN);
-		*IXDP2X01_CPLD_RESET_REG = 0xffffffff;
+		ixp2000_reg_write(IXDP2X01_CPLD_FLASH_REG,
+					((0 >> IXDP2X01_FLASH_WINDOW_BITS)
+						| IXDP2X01_CPLD_FLASH_INTERN));
+		ixp2000_reg_wrb(IXDP2X01_CPLD_RESET_REG, 0xffffffff);
 	}
 
 	/*
 	 * On IXDP2801 we need to write this magic sequence to the CPLD
 	 * to cause a complete reset of the CPU and all external devices
-	 * and moves the flash bank register back to 0.
+	 * and move the flash bank register back to 0.
 	 */
 	if (machine_is_ixdp2801()) {
 		unsigned long reset_reg = *IXDP2X01_CPLD_RESET_REG;
+
 		reset_reg = 0x55AA0000 | (reset_reg & 0x0000FFFF);
-		*IXDP2X01_CPLD_RESET_REG = reset_reg;
-		mb();
-		*IXDP2X01_CPLD_RESET_REG = 0x80000000;
+		ixp2000_reg_write(IXDP2X01_CPLD_RESET_REG, reset_reg);
+		ixp2000_reg_wrb(IXDP2X01_CPLD_RESET_REG, 0x80000000);
 	}
 
-	*IXP2000_RESET0 = RSTALL;
+	ixp2000_reg_wrb(IXP2000_RESET0, RSTALL);
 }