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authorLennert Buytenhek <buytenh@wantstofly.org>2005-11-01 19:53:50 +0000
committerRussell King <rmk+kernel@arm.linux.org.uk>2005-11-01 19:53:50 +0000
commitd01e8897fcf597f62d84f626fdced8d94c70deaf (patch)
tree72e25f7df9b10aec46ccca594414f91eef092860 /include/asm-arm/arch-ixp2000/ixp2000-regs.h
parentfadab0943d1c5b652a66858bb99b204fedaad96b (diff)
downloadop-kernel-dev-d01e8897fcf597f62d84f626fdced8d94c70deaf.zip
op-kernel-dev-d01e8897fcf597f62d84f626fdced8d94c70deaf.tar.gz
[ARM] 3052/1: add ixp2000 microcode loader
Patch from Lennert Buytenhek This patch adds a microcode loader for the ixp2000 architecture. The ixp2000 is an xscale-based CPU with a number of additional small CPUs ('microengines') on die that can be programmed to do various things. Depending on the ixp2000 model, there are between 2 and 16 microengines. This code provides an API that allows configuring the microengines, loading code into them, and starting and stopping them and reading out a number of status registers, and is used by the microengine network driver that was recently announced to netdev. Signed-off-by: Lennert Buytenhek <buytenh@wantstofly.org> Signed-off-by: Deepak Saxena <dsaxena@plexity.net> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'include/asm-arm/arch-ixp2000/ixp2000-regs.h')
-rw-r--r--include/asm-arm/arch-ixp2000/ixp2000-regs.h5
1 files changed, 3 insertions, 2 deletions
diff --git a/include/asm-arm/arch-ixp2000/ixp2000-regs.h b/include/asm-arm/arch-ixp2000/ixp2000-regs.h
index 7422f66..fc5ac6a 100644
--- a/include/asm-arm/arch-ixp2000/ixp2000-regs.h
+++ b/include/asm-arm/arch-ixp2000/ixp2000-regs.h
@@ -59,14 +59,15 @@
#define IXP2000_CAP_SIZE 0x00100000
/*
- * Addresses for specific on-chip peripherals
+ * Addresses for specific on-chip peripherals.
*/
#define IXP2000_SLOWPORT_CSR_VIRT_BASE 0xfef80000
#define IXP2000_GLOBAL_REG_VIRT_BASE 0xfef04000
#define IXP2000_UART_PHYS_BASE 0xc0030000
#define IXP2000_UART_VIRT_BASE 0xfef30000
#define IXP2000_TIMER_VIRT_BASE 0xfef20000
-#define IXP2000_GPIO_VIRT_BASE 0Xfef10000
+#define IXP2000_UENGINE_CSR_VIRT_BASE 0xfef18000
+#define IXP2000_GPIO_VIRT_BASE 0xfef10000
/*
* Devices outside of the 0xc0000000 -> 0xc0100000 range. The virtual
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