diff options
author | Linus Torvalds <torvalds@ppc970.osdl.org> | 2005-04-16 15:20:36 -0700 |
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committer | Linus Torvalds <torvalds@ppc970.osdl.org> | 2005-04-16 15:20:36 -0700 |
commit | 1da177e4c3f41524e886b7f1b8a0c1fc7321cac2 (patch) | |
tree | 0bba044c4ce775e45a88a51686b5d9f90697ea9d /include/asm-arm/arch-ebsa285 | |
download | op-kernel-dev-1da177e4c3f41524e886b7f1b8a0c1fc7321cac2.zip op-kernel-dev-1da177e4c3f41524e886b7f1b8a0c1fc7321cac2.tar.gz |
Linux-2.6.12-rc2v2.6.12-rc2
Initial git repository build. I'm not bothering with the full history,
even though we have it. We can create a separate "historical" git
archive of that later if we want to, and in the meantime it's about
3.2GB when imported into git - space that would just make the early
git days unnecessarily complicated, when we don't have a lot of good
infrastructure for it.
Let it rip!
Diffstat (limited to 'include/asm-arm/arch-ebsa285')
-rw-r--r-- | include/asm-arm/arch-ebsa285/debug-macro.S | 66 | ||||
-rw-r--r-- | include/asm-arm/arch-ebsa285/dma.h | 30 | ||||
-rw-r--r-- | include/asm-arm/arch-ebsa285/entry-macro.S | 105 | ||||
-rw-r--r-- | include/asm-arm/arch-ebsa285/hardware.h | 139 | ||||
-rw-r--r-- | include/asm-arm/arch-ebsa285/io.h | 45 | ||||
-rw-r--r-- | include/asm-arm/arch-ebsa285/irqs.h | 98 | ||||
-rw-r--r-- | include/asm-arm/arch-ebsa285/memory.h | 75 | ||||
-rw-r--r-- | include/asm-arm/arch-ebsa285/param.h | 3 | ||||
-rw-r--r-- | include/asm-arm/arch-ebsa285/system.h | 69 | ||||
-rw-r--r-- | include/asm-arm/arch-ebsa285/timex.h | 18 | ||||
-rw-r--r-- | include/asm-arm/arch-ebsa285/uncompress.h | 46 | ||||
-rw-r--r-- | include/asm-arm/arch-ebsa285/vmalloc.h | 26 |
12 files changed, 720 insertions, 0 deletions
diff --git a/include/asm-arm/arch-ebsa285/debug-macro.S b/include/asm-arm/arch-ebsa285/debug-macro.S new file mode 100644 index 0000000..237853d --- /dev/null +++ b/include/asm-arm/arch-ebsa285/debug-macro.S @@ -0,0 +1,66 @@ +/* linux/include/asm-arm/arch-ebsa285/debug-macro.S + * + * Debugging macro include header + * + * Copyright (C) 1994-1999 Russell King + * Moved from linux/arch/arm/kernel/debug.S by Ben Dooks + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * +*/ + +#include <asm/hardware/dec21285.h> + +#ifndef CONFIG_DEBUG_DC21285_PORT + /* For NetWinder debugging */ + .macro addruart,rx + mrc p15, 0, \rx, c1, c0 + tst \rx, #1 @ MMU enabled? + moveq \rx, #0x7c000000 @ physical + movne \rx, #0xff000000 @ virtual + orr \rx, \rx, #0x000003f8 + .endm + + .macro senduart,rd,rx + strb \rd, [\rx] + .endm + + .macro busyuart,rd,rx +1002: ldrb \rd, [\rx, #0x5] + and \rd, \rd, #0x60 + teq \rd, #0x60 + bne 1002b + .endm + + .macro waituart,rd,rx +1001: ldrb \rd, [\rx, #0x6] + tst \rd, #0x10 + beq 1001b + .endm +#else + /* For EBSA285 debugging */ + .equ dc21285_high, ARMCSR_BASE & 0xff000000 + .equ dc21285_low, ARMCSR_BASE & 0x00ffffff + + .macro addruart,rx + mov \rx, #dc21285_high + .if dc21285_low + orr \rx, \rx, #dc21285_low + .endif + .endm + + .macro senduart,rd,rx + str \rd, [\rx, #0x160] @ UARTDR + .endm + + .macro busyuart,rd,rx +1001: ldr \rd, [\rx, #0x178] @ UARTFLG + tst \rd, #1 << 3 + bne 1001b + .endm + + .macro waituart,rd,rx + .endm +#endif diff --git a/include/asm-arm/arch-ebsa285/dma.h b/include/asm-arm/arch-ebsa285/dma.h new file mode 100644 index 0000000..c43046e --- /dev/null +++ b/include/asm-arm/arch-ebsa285/dma.h @@ -0,0 +1,30 @@ +/* + * linux/include/asm-arm/arch-ebsa285/dma.h + * + * Architecture DMA routines + * + * Copyright (C) 1998,1999 Russell King + * Copyright (C) 1998,1999 Philip Blundell + */ +#ifndef __ASM_ARCH_DMA_H +#define __ASM_ARCH_DMA_H + +/* + * This is the maximum DMA address that can be DMAd to. + */ +#define MAX_DMA_ADDRESS 0xffffffff + +/* + * The 21285 has two internal DMA channels; we call these 8 and 9. + * On CATS hardware we have an additional eight ISA dma channels + * numbered 0..7. + */ +#define _ISA_DMA(x) (0+(x)) +#define _DC21285_DMA(x) (8+(x)) + +#define MAX_DMA_CHANNELS 10 + +#define DMA_FLOPPY _ISA_DMA(2) +#define DMA_ISA_CASCADE _ISA_DMA(4) + +#endif /* _ASM_ARCH_DMA_H */ diff --git a/include/asm-arm/arch-ebsa285/entry-macro.S b/include/asm-arm/arch-ebsa285/entry-macro.S new file mode 100644 index 0000000..db5729f --- /dev/null +++ b/include/asm-arm/arch-ebsa285/entry-macro.S @@ -0,0 +1,105 @@ +/* + * include/asm-arm/arch-footbridge/entry-macro.S + * + * Low-level IRQ helper macros for footbridge-based platforms + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ +#include <asm/hardware/dec21285.h> + + .macro disable_fiq + .endm + + .equ dc21285_high, ARMCSR_BASE & 0xff000000 + .equ dc21285_low, ARMCSR_BASE & 0x00ffffff + + .macro get_irqnr_and_base, irqnr, irqstat, base, tmp + mov r4, #dc21285_high + .if dc21285_low + orr r4, r4, #dc21285_low + .endif + ldr \irqstat, [r4, #0x180] @ get interrupts + + mov \irqnr, #IRQ_SDRAMPARITY + tst \irqstat, #IRQ_MASK_SDRAMPARITY + bne 1001f + + tst \irqstat, #IRQ_MASK_UART_RX + movne \irqnr, #IRQ_CONRX + bne 1001f + + tst \irqstat, #IRQ_MASK_DMA1 + movne \irqnr, #IRQ_DMA1 + bne 1001f + + tst \irqstat, #IRQ_MASK_DMA2 + movne \irqnr, #IRQ_DMA2 + bne 1001f + + tst \irqstat, #IRQ_MASK_IN0 + movne \irqnr, #IRQ_IN0 + bne 1001f + + tst \irqstat, #IRQ_MASK_IN1 + movne \irqnr, #IRQ_IN1 + bne 1001f + + tst \irqstat, #IRQ_MASK_IN2 + movne \irqnr, #IRQ_IN2 + bne 1001f + + tst \irqstat, #IRQ_MASK_IN3 + movne \irqnr, #IRQ_IN3 + bne 1001f + + tst \irqstat, #IRQ_MASK_PCI + movne \irqnr, #IRQ_PCI + bne 1001f + + tst \irqstat, #IRQ_MASK_DOORBELLHOST + movne \irqnr, #IRQ_DOORBELLHOST + bne 1001f + + tst \irqstat, #IRQ_MASK_I2OINPOST + movne \irqnr, #IRQ_I2OINPOST + bne 1001f + + tst \irqstat, #IRQ_MASK_TIMER1 + movne \irqnr, #IRQ_TIMER1 + bne 1001f + + tst \irqstat, #IRQ_MASK_TIMER2 + movne \irqnr, #IRQ_TIMER2 + bne 1001f + + tst \irqstat, #IRQ_MASK_TIMER3 + movne \irqnr, #IRQ_TIMER3 + bne 1001f + + tst \irqstat, #IRQ_MASK_UART_TX + movne \irqnr, #IRQ_CONTX + bne 1001f + + tst \irqstat, #IRQ_MASK_PCI_ABORT + movne \irqnr, #IRQ_PCI_ABORT + bne 1001f + + tst \irqstat, #IRQ_MASK_PCI_SERR + movne \irqnr, #IRQ_PCI_SERR + bne 1001f + + tst \irqstat, #IRQ_MASK_DISCARD_TIMER + movne \irqnr, #IRQ_DISCARD_TIMER + bne 1001f + + tst \irqstat, #IRQ_MASK_PCI_DPERR + movne \irqnr, #IRQ_PCI_DPERR + bne 1001f + + tst \irqstat, #IRQ_MASK_PCI_PERR + movne \irqnr, #IRQ_PCI_PERR +1001: + .endm + diff --git a/include/asm-arm/arch-ebsa285/hardware.h b/include/asm-arm/arch-ebsa285/hardware.h new file mode 100644 index 0000000..2ef2200 --- /dev/null +++ b/include/asm-arm/arch-ebsa285/hardware.h @@ -0,0 +1,139 @@ +/* + * linux/include/asm-arm/arch-ebsa285/hardware.h + * + * Copyright (C) 1998-1999 Russell King. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This file contains the hardware definitions of the EBSA-285. + */ +#ifndef __ASM_ARCH_HARDWARE_H +#define __ASM_ARCH_HARDWARE_H + +#include <linux/config.h> +#include <asm/arch/memory.h> + +#ifdef CONFIG_ARCH_FOOTBRIDGE +/* Virtual Physical Size + * 0xff800000 0x40000000 1MB X-Bus + * 0xff000000 0x7c000000 1MB PCI I/O space + * 0xfe000000 0x42000000 1MB CSR + * 0xfd000000 0x78000000 1MB Outbound write flush (not supported) + * 0xfc000000 0x79000000 1MB PCI IACK/special space + * 0xfb000000 0x7a000000 16MB PCI Config type 1 + * 0xfa000000 0x7b000000 16MB PCI Config type 0 + * 0xf9000000 0x50000000 1MB Cache flush + * 0xf0000000 0x80000000 16MB ISA memory + */ +#define XBUS_SIZE 0x00100000 +#define XBUS_BASE 0xff800000 + +#define PCIO_SIZE 0x00100000 +#define PCIO_BASE 0xff000000 + +#define ARMCSR_SIZE 0x00100000 +#define ARMCSR_BASE 0xfe000000 + +#define WFLUSH_SIZE 0x00100000 +#define WFLUSH_BASE 0xfd000000 + +#define PCIIACK_SIZE 0x00100000 +#define PCIIACK_BASE 0xfc000000 + +#define PCICFG1_SIZE 0x01000000 +#define PCICFG1_BASE 0xfb000000 + +#define PCICFG0_SIZE 0x01000000 +#define PCICFG0_BASE 0xfa000000 + +#define FLUSH_SIZE 0x00100000 +#define FLUSH_BASE 0xf9000000 + +#define PCIMEM_SIZE 0x01000000 +#define PCIMEM_BASE 0xf0000000 + +#elif defined(CONFIG_ARCH_CO285) +/* + * This is the COEBSA285 cut-down mapping + */ +#define PCIMEM_SIZE 0x80000000 +#define PCIMEM_BASE 0x80000000 + +#define FLUSH_SIZE 0x00100000 +#define FLUSH_BASE 0x7e000000 + +#define WFLUSH_SIZE 0x01000000 +#define WFLUSH_BASE 0x7d000000 + +#define ARMCSR_SIZE 0x00100000 +#define ARMCSR_BASE 0x7cf00000 + +#define XBUS_SIZE 0x00020000 +#define XBUS_BASE 0x7cee0000 + +#define PCIO_SIZE 0x00010000 +#define PCIO_BASE 0x7ced0000 + +#else + +#error "Undefined footbridge architecture" + +#endif + +#define XBUS_LEDS ((volatile unsigned char *)(XBUS_BASE + 0x12000)) +#define XBUS_LED_AMBER (1 << 0) +#define XBUS_LED_GREEN (1 << 1) +#define XBUS_LED_RED (1 << 2) +#define XBUS_LED_TOGGLE (1 << 8) + +#define XBUS_SWITCH ((volatile unsigned char *)(XBUS_BASE + 0x12000)) +#define XBUS_SWITCH_SWITCH ((*XBUS_SWITCH) & 15) +#define XBUS_SWITCH_J17_13 ((*XBUS_SWITCH) & (1 << 4)) +#define XBUS_SWITCH_J17_11 ((*XBUS_SWITCH) & (1 << 5)) +#define XBUS_SWITCH_J17_9 ((*XBUS_SWITCH) & (1 << 6)) + +#define FLUSH_BASE_PHYS 0x50000000 +#define UNCACHEABLE_ADDR (ARMCSR_BASE + 0x108) + + +/* PIC irq control */ +#define PIC_LO 0x20 +#define PIC_MASK_LO 0x21 +#define PIC_HI 0xA0 +#define PIC_MASK_HI 0xA1 + +/* GPIO pins */ +#define GPIO_CCLK 0x800 +#define GPIO_DSCLK 0x400 +#define GPIO_E2CLK 0x200 +#define GPIO_IOLOAD 0x100 +#define GPIO_RED_LED 0x080 +#define GPIO_WDTIMER 0x040 +#define GPIO_DATA 0x020 +#define GPIO_IOCLK 0x010 +#define GPIO_DONE 0x008 +#define GPIO_FAN 0x004 +#define GPIO_GREEN_LED 0x002 +#define GPIO_RESET 0x001 + +/* CPLD pins */ +#define CPLD_DS_ENABLE 8 +#define CPLD_7111_DISABLE 4 +#define CPLD_UNMUTE 2 +#define CPLD_FLASH_WR_ENABLE 1 + +#ifndef __ASSEMBLY__ +extern void gpio_modify_op(int mask, int set); +extern void gpio_modify_io(int mask, int in); +extern int gpio_read(void); +extern void cpld_modify(int mask, int set); +#endif + +#define pcibios_assign_all_busses() 1 + +#define PCIBIOS_MIN_IO 0x1000 +#define PCIBIOS_MIN_MEM 0x81000000 + +#endif diff --git a/include/asm-arm/arch-ebsa285/io.h b/include/asm-arm/arch-ebsa285/io.h new file mode 100644 index 0000000..70576b1 --- /dev/null +++ b/include/asm-arm/arch-ebsa285/io.h @@ -0,0 +1,45 @@ +/* + * linux/include/asm-arm/arch-ebsa285/io.h + * + * Copyright (C) 1997-1999 Russell King + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * Modifications: + * 06-12-1997 RMK Created. + * 07-04-1999 RMK Major cleanup + */ +#ifndef __ASM_ARM_ARCH_IO_H +#define __ASM_ARM_ARCH_IO_H + +#define IO_SPACE_LIMIT 0xffff + +/* + * Translation of various region addresses to virtual addresses + */ +#define __io(a) ((void __iomem *)(PCIO_BASE + (a))) +#if 1 +#define __mem_pci(a) (a) +#define __mem_isa(a) ((a) + PCIMEM_BASE) +#else + +static inline void __iomem *___mem_pci(void __iomem *p) +{ + unsigned long a = (unsigned long)p; + BUG_ON(a <= 0xc0000000 || a >= 0xe0000000); + return p; +} + +static inline void __iomem *___mem_isa(void __iomem *p) +{ + unsigned long a = (unsigned long)p; + BUG_ON(a >= 16*1048576); + return p + PCIMEM_BASE; +} +#define __mem_pci(a) ___mem_pci(a) +#define __mem_isa(a) ___mem_isa(a) +#endif + +#endif diff --git a/include/asm-arm/arch-ebsa285/irqs.h b/include/asm-arm/arch-ebsa285/irqs.h new file mode 100644 index 0000000..3e766f1 --- /dev/null +++ b/include/asm-arm/arch-ebsa285/irqs.h @@ -0,0 +1,98 @@ +/* + * linux/include/asm-arm/arch-ebsa285/irqs.h + * + * Copyright (C) 1998 Russell King + * Copyright (C) 1998 Phil Blundell + * + * Changelog: + * 20-Jan-1998 RMK Started merge of EBSA286, CATS and NetWinder + * 01-Feb-1999 PJB ISA IRQs start at 0 not 16 + */ +#include <asm/mach-types.h> + +#define NR_IRQS 36 +#define NR_DC21285_IRQS 16 + +#define _ISA_IRQ(x) (0 + (x)) +#define _ISA_INR(x) ((x) - 0) +#define _DC21285_IRQ(x) (16 + (x)) +#define _DC21285_INR(x) ((x) - 16) + +/* + * This is a list of all interrupts that the 21285 + * can generate and we handle. + */ +#define IRQ_CONRX _DC21285_IRQ(0) +#define IRQ_CONTX _DC21285_IRQ(1) +#define IRQ_TIMER1 _DC21285_IRQ(2) +#define IRQ_TIMER2 _DC21285_IRQ(3) +#define IRQ_TIMER3 _DC21285_IRQ(4) +#define IRQ_IN0 _DC21285_IRQ(5) +#define IRQ_IN1 _DC21285_IRQ(6) +#define IRQ_IN2 _DC21285_IRQ(7) +#define IRQ_IN3 _DC21285_IRQ(8) +#define IRQ_DOORBELLHOST _DC21285_IRQ(9) +#define IRQ_DMA1 _DC21285_IRQ(10) +#define IRQ_DMA2 _DC21285_IRQ(11) +#define IRQ_PCI _DC21285_IRQ(12) +#define IRQ_SDRAMPARITY _DC21285_IRQ(13) +#define IRQ_I2OINPOST _DC21285_IRQ(14) +#define IRQ_PCI_ABORT _DC21285_IRQ(15) +#define IRQ_PCI_SERR _DC21285_IRQ(16) +#define IRQ_DISCARD_TIMER _DC21285_IRQ(17) +#define IRQ_PCI_DPERR _DC21285_IRQ(18) +#define IRQ_PCI_PERR _DC21285_IRQ(19) + +#define IRQ_ISA_TIMER _ISA_IRQ(0) +#define IRQ_ISA_KEYBOARD _ISA_IRQ(1) +#define IRQ_ISA_CASCADE _ISA_IRQ(2) +#define IRQ_ISA_UART2 _ISA_IRQ(3) +#define IRQ_ISA_UART _ISA_IRQ(4) +#define IRQ_ISA_FLOPPY _ISA_IRQ(6) +#define IRQ_ISA_PRINTER _ISA_IRQ(7) +#define IRQ_ISA_RTC_ALARM _ISA_IRQ(8) +#define IRQ_ISA_2 _ISA_IRQ(9) +#define IRQ_ISA_PS2MOUSE _ISA_IRQ(12) +#define IRQ_ISA_HARDDISK1 _ISA_IRQ(14) +#define IRQ_ISA_HARDDISK2 _ISA_IRQ(15) + +#define IRQ_MASK_UART_RX (1 << 2) +#define IRQ_MASK_UART_TX (1 << 3) +#define IRQ_MASK_TIMER1 (1 << 4) +#define IRQ_MASK_TIMER2 (1 << 5) +#define IRQ_MASK_TIMER3 (1 << 6) +#define IRQ_MASK_IN0 (1 << 8) +#define IRQ_MASK_IN1 (1 << 9) +#define IRQ_MASK_IN2 (1 << 10) +#define IRQ_MASK_IN3 (1 << 11) +#define IRQ_MASK_DOORBELLHOST (1 << 15) +#define IRQ_MASK_DMA1 (1 << 16) +#define IRQ_MASK_DMA2 (1 << 17) +#define IRQ_MASK_PCI (1 << 18) +#define IRQ_MASK_SDRAMPARITY (1 << 24) +#define IRQ_MASK_I2OINPOST (1 << 25) +#define IRQ_MASK_PCI_ABORT ((1 << 29) | (1 << 30)) +#define IRQ_MASK_PCI_SERR (1 << 23) +#define IRQ_MASK_DISCARD_TIMER (1 << 27) +#define IRQ_MASK_PCI_DPERR (1 << 28) +#define IRQ_MASK_PCI_PERR (1 << 31) + +/* + * Netwinder interrupt allocations + */ +#define IRQ_NETWINDER_ETHER10 IRQ_IN0 +#define IRQ_NETWINDER_ETHER100 IRQ_IN1 +#define IRQ_NETWINDER_VIDCOMP IRQ_IN2 +#define IRQ_NETWINDER_PS2MOUSE _ISA_IRQ(5) +#define IRQ_NETWINDER_IR _ISA_IRQ(6) +#define IRQ_NETWINDER_BUTTON _ISA_IRQ(10) +#define IRQ_NETWINDER_VGA _ISA_IRQ(11) +#define IRQ_NETWINDER_SOUND _ISA_IRQ(12) + +#undef RTC_IRQ +#define RTC_IRQ IRQ_ISA_RTC_ALARM +#define I8042_KBD_IRQ IRQ_ISA_KEYBOARD +#define I8042_AUX_IRQ (machine_is_netwinder() ? IRQ_NETWINDER_PS2MOUSE : IRQ_ISA_PS2MOUSE) +#define IRQ_FLOPPYDISK IRQ_ISA_FLOPPY + +#define irq_canonicalize(_i) (((_i) == IRQ_ISA_CASCADE) ? IRQ_ISA_2 : _i) diff --git a/include/asm-arm/arch-ebsa285/memory.h b/include/asm-arm/arch-ebsa285/memory.h new file mode 100644 index 0000000..d0466f9 --- /dev/null +++ b/include/asm-arm/arch-ebsa285/memory.h @@ -0,0 +1,75 @@ +/* + * linux/include/asm-arm/arch-ebsa285/memory.h + * + * Copyright (C) 1996-1999 Russell King. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * Changelog: + * 20-Oct-1996 RMK Created + * 31-Dec-1997 RMK Fixed definitions to reduce warnings. + * 17-May-1998 DAG Added __virt_to_bus and __bus_to_virt functions. + * 21-Nov-1998 RMK Changed __virt_to_bus and __bus_to_virt to macros. + * 21-Mar-1999 RMK Added PAGE_OFFSET for co285 architecture. + * Renamed to memory.h + * Moved PAGE_OFFSET and TASK_SIZE here + */ +#ifndef __ASM_ARCH_MEMORY_H +#define __ASM_ARCH_MEMORY_H + +#include <linux/config.h> + +#if defined(CONFIG_FOOTBRIDGE_ADDIN) +/* + * If we may be using add-in footbridge mode, then we must + * use the out-of-line translation that makes use of the + * PCI BAR + */ +#ifndef __ASSEMBLY__ +extern unsigned long __virt_to_bus(unsigned long); +extern unsigned long __bus_to_virt(unsigned long); +#endif + +#elif defined(CONFIG_FOOTBRIDGE_HOST) + +#define __virt_to_bus(x) ((x) - 0xe0000000) +#define __bus_to_virt(x) ((x) + 0xe0000000) + +#else + +#error "Undefined footbridge mode" + +#endif + +#if defined(CONFIG_ARCH_FOOTBRIDGE) + +/* Task size and page offset at 3GB */ +#define TASK_SIZE (0xbf000000UL) +#define PAGE_OFFSET (0xc0000000UL) + +#elif defined(CONFIG_ARCH_CO285) + +/* Task size and page offset at 1.5GB */ +#define TASK_SIZE (0x5f000000UL) +#define PAGE_OFFSET (0x60000000UL) + +#else + +#error "Undefined footbridge architecture" + +#endif + +/* + * Physical DRAM offset. + */ +#define PHYS_OFFSET (0x00000000UL) + +/* + * This decides where the kernel will search for a free chunk of vm + * space during mmap's. + */ +#define TASK_UNMAPPED_BASE ((TASK_SIZE + 0x01000000) / 3) + +#endif diff --git a/include/asm-arm/arch-ebsa285/param.h b/include/asm-arm/arch-ebsa285/param.h new file mode 100644 index 0000000..3827103 --- /dev/null +++ b/include/asm-arm/arch-ebsa285/param.h @@ -0,0 +1,3 @@ +/* + * linux/include/asm-arm/arch-ebsa285/param.h + */ diff --git a/include/asm-arm/arch-ebsa285/system.h b/include/asm-arm/arch-ebsa285/system.h new file mode 100644 index 0000000..bf91c69 --- /dev/null +++ b/include/asm-arm/arch-ebsa285/system.h @@ -0,0 +1,69 @@ +/* + * linux/include/asm-arm/arch-ebsa285/system.h + * + * Copyright (C) 1996-1999 Russell King. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +#include <asm/hardware/dec21285.h> +#include <asm/io.h> +#include <asm/hardware.h> +#include <asm/leds.h> +#include <asm/mach-types.h> + +static inline void arch_idle(void) +{ + cpu_do_idle(); +} + +static inline void arch_reset(char mode) +{ + if (mode == 's') { + /* + * Jump into the ROM + */ + cpu_reset(0x41000000); + } else { + if (machine_is_netwinder()) { + /* open up the SuperIO chip + */ + outb(0x87, 0x370); + outb(0x87, 0x370); + + /* aux function group 1 (logical device 7) + */ + outb(0x07, 0x370); + outb(0x07, 0x371); + + /* set GP16 for WD-TIMER output + */ + outb(0xe6, 0x370); + outb(0x00, 0x371); + + /* set a RED LED and toggle WD_TIMER for rebooting + */ + outb(0xc4, 0x338); + } else { + /* + * Force the watchdog to do a CPU reset. + * + * After making sure that the watchdog is disabled + * (so we can change the timer registers) we first + * enable the timer to autoreload itself. Next, the + * timer interval is set really short and any + * current interrupt request is cleared (so we can + * see an edge transition). Finally, TIMER4 is + * enabled as the watchdog. + */ + *CSR_SA110_CNTL &= ~(1 << 13); + *CSR_TIMER4_CNTL = TIMER_CNTL_ENABLE | + TIMER_CNTL_AUTORELOAD | + TIMER_CNTL_DIV16; + *CSR_TIMER4_LOAD = 0x2; + *CSR_TIMER4_CLR = 0; + *CSR_SA110_CNTL |= (1 << 13); + } + } +} diff --git a/include/asm-arm/arch-ebsa285/timex.h b/include/asm-arm/arch-ebsa285/timex.h new file mode 100644 index 0000000..df60b38 --- /dev/null +++ b/include/asm-arm/arch-ebsa285/timex.h @@ -0,0 +1,18 @@ +/* + * linux/include/asm-arm/arch-ebsa285/timex.h + * + * Copyright (C) 1998 Russell King + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * EBSA285 architecture timex specifications + */ + +/* + * We assume a constant here; this satisfies the maths in linux/timex.h + * and linux/time.h. CLOCK_TICK_RATE is actually system dependent, but + * this must be a constant. + */ +#define CLOCK_TICK_RATE (50000000/16) diff --git a/include/asm-arm/arch-ebsa285/uncompress.h b/include/asm-arm/arch-ebsa285/uncompress.h new file mode 100644 index 0000000..c2fd84e --- /dev/null +++ b/include/asm-arm/arch-ebsa285/uncompress.h @@ -0,0 +1,46 @@ +/* + * linux/include/asm-arm/arch-ebsa285/uncompress.h + * + * Copyright (C) 1996-1999 Russell King + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +#include <asm/mach-types.h> + +/* + * Note! This could cause problems on the NetWinder + */ +#define DC21285_BASE ((volatile unsigned int *)0x42000160) +#define SER0_BASE ((volatile unsigned char *)0x7c0003f8) + +static __inline__ void putc(char c) +{ + if (machine_is_netwinder()) { + while ((SER0_BASE[5] & 0x60) != 0x60); + SER0_BASE[0] = c; + } else { + while (DC21285_BASE[6] & 8); + DC21285_BASE[0] = c; + } +} + +/* + * This does not append a newline + */ +static void putstr(const char *s) +{ + while (*s) { + putc(*s); + if (*s == '\n') + putc('\r'); + s++; + } +} + +/* + * nothing to do + */ +#define arch_decomp_setup() +#define arch_decomp_wdog() diff --git a/include/asm-arm/arch-ebsa285/vmalloc.h b/include/asm-arm/arch-ebsa285/vmalloc.h new file mode 100644 index 0000000..def705a --- /dev/null +++ b/include/asm-arm/arch-ebsa285/vmalloc.h @@ -0,0 +1,26 @@ +/* + * linux/include/asm-arm/arch-ebsa285/vmalloc.h + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include <linux/config.h> + +/* + * Just any arbitrary offset to the start of the vmalloc VM area: the + * current 8MB value just means that there will be a 8MB "hole" after the + * physical memory until the kernel virtual memory starts. That means that + * any out-of-bounds memory accesses will hopefully be caught. + * The vmalloc() routines leaves a hole of 4kB between each vmalloced + * area for the same reason. ;) + */ +#define VMALLOC_OFFSET (8*1024*1024) +#define VMALLOC_START (((unsigned long)high_memory + VMALLOC_OFFSET) & ~(VMALLOC_OFFSET-1)) + +#ifdef CONFIG_ARCH_FOOTBRIDGE +#define VMALLOC_END (PAGE_OFFSET + 0x30000000) +#else +#define VMALLOC_END (PAGE_OFFSET + 0x20000000) +#endif |