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authorKoji Matsuoka <koji.matsuoka.xm@renesas.com>2016-11-11 18:07:41 +0100
committerLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>2017-04-04 17:04:19 +0300
commitdc4aedbf7c152c092c19e980a9fa1e89d6bc215f (patch)
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parent4739a0d40b668ed4d60e048ee8ff03cd863e0987 (diff)
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drm: rcar-du: Add DPLL support
The implementation hardcodes a workaround for the H3 ES1.x SoC regardless of the SoC revision, as the workaround can be safely applied on all devices in the Gen3 family without any side effect. Signed-off-by: Koji Matsuoka <koji.matsuoka.xm@renesas.com> Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
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