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author | Shashank Sharma <shashank.sharma@intel.com> | 2014-06-02 18:07:47 +0530 |
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committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2014-06-11 16:57:39 +0200 |
commit | 4ad83e94059969b5b3ac107ee002d9401e8ac5b3 (patch) | |
tree | 46c696a563fab20a092aaf2466e6085ca547fba2 /fs/fhandle.c | |
parent | 1a5036bfd40bd7138fef8bb35adce7d76d8da924 (diff) | |
download | op-kernel-dev-4ad83e94059969b5b3ac107ee002d9401e8ac5b3.zip op-kernel-dev-4ad83e94059969b5b3ac107ee002d9401e8ac5b3.tar.gz |
drm/i915: Change Mipi register definitions
Re-define MIPI register definitions in such a way that most of
the existing DSI code can be re-used for future platforms. Register
definitions are re-written using MMIO offset variable, so that without
changing the existing sequence, same code can be generically applied.
V4: Addressing review comments by Damien and Ville, splitting into two patches
This patch removes all the un-necessary formatting changes from previous patch.
V5: Removed 80 char limit formatting for existing MIPI regs
V6: Removed extra space, change one definition
Signed-off-by: Shashank Sharma <shashank.sharma@intel.com>
Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'fs/fhandle.c')
0 files changed, 0 insertions, 0 deletions