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| author | Rajendra Nayak <rnayak@ti.com> | 2009-10-05 13:31:44 -0700 |
|---|---|---|
| committer | Tony Lindgren <tony@atomide.com> | 2009-10-05 13:31:44 -0700 |
| commit | 7a66a39b8599e09c82e2e95fec55f414ad015282 (patch) | |
| tree | c165a9f12cf643c568d314c2ffe261915e92047f /firmware/ti_5052.fw.ihex | |
| parent | a9f82d10d1c20b433a12b08e6e78bced6f596c5f (diff) | |
| download | op-kernel-dev-7a66a39b8599e09c82e2e95fec55f414ad015282.zip op-kernel-dev-7a66a39b8599e09c82e2e95fec55f414ad015282.tar.gz | |
omap: Lock DPLL5 at boot
Lock DPLL5 at 120MHz at boot. The USBHOST 120MHz f-clock and
USBTLL f-clock are the only users of this DPLL, and 120MHz is
is the only recommended rate for these clocks.
With this patch, the 60 MHz ULPI clock is generated correctly.
Tested on an OMAP3430 SDP.
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
Signed-off-by: Anand Gadiyar <gadiyar@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'firmware/ti_5052.fw.ihex')
0 files changed, 0 insertions, 0 deletions
