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author | Marc Zyngier <marc.zyngier@arm.com> | 2017-06-09 12:49:44 +0100 |
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committer | Marc Zyngier <marc.zyngier@arm.com> | 2017-06-15 09:45:02 +0100 |
commit | eab0b2dc4f6f34147e3d10da49ab8032e15dbea0 (patch) | |
tree | 3493f16faf198391601b65fcb3cc2978ddf50c9b /firmware/radeon/RV610_me.bin.ihex | |
parent | fbc48a0011deb3d51cb657ca9c0f9083f41c0665 (diff) | |
download | op-kernel-dev-eab0b2dc4f6f34147e3d10da49ab8032e15dbea0.zip op-kernel-dev-eab0b2dc4f6f34147e3d10da49ab8032e15dbea0.tar.gz |
KVM: arm64: vgic-v3: Add misc Group-0 handlers
A number of Group-0 registers can be handled by the same accessors
as that of Group-1, so let's add the required system register encodings
and catch them in the dispatching function.
Tested-by: Alexander Graf <agraf@suse.de>
Acked-by: David Daney <david.daney@cavium.com>
Acked-by: Christoffer Dall <cdall@linaro.org>
Reviewed-by: Eric Auger <eric.auger@redhat.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <cdall@linaro.org>
Diffstat (limited to 'firmware/radeon/RV610_me.bin.ihex')
0 files changed, 0 insertions, 0 deletions