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authorJaswinder Singh <jaswinder@infradead.org>2008-07-05 15:28:30 +0530
committerDavid Woodhouse <David.Woodhouse@intel.com>2008-07-14 14:45:32 -0700
commit7f127d5ed0da66053482a3e18014c439da3c41d1 (patch)
tree930f6c1ed636490e9ecb56bacf8fdd4ec5bdc6ba /firmware/dsp56k/bootstrap.asm
parentd12b219a228efe92f0778ed3af21305e65fbb052 (diff)
downloadop-kernel-dev-7f127d5ed0da66053482a3e18014c439da3c41d1.zip
op-kernel-dev-7f127d5ed0da66053482a3e18014c439da3c41d1.tar.gz
dsp56k: use request_firmware
Signed-off-by: Jaswinder Singh <jaswinder@infradead.org> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Diffstat (limited to 'firmware/dsp56k/bootstrap.asm')
-rw-r--r--firmware/dsp56k/bootstrap.asm98
1 files changed, 98 insertions, 0 deletions
diff --git a/firmware/dsp56k/bootstrap.asm b/firmware/dsp56k/bootstrap.asm
new file mode 100644
index 0000000..10d8919
--- /dev/null
+++ b/firmware/dsp56k/bootstrap.asm
@@ -0,0 +1,98 @@
+; Author: Frederik Noring <noring@nocrew.org>
+;
+; This file is subject to the terms and conditions of the GNU General Public
+; License. See the file COPYING in the main directory of this archive
+; for more details.
+
+; DSP56k loader
+
+; Host Interface
+M_BCR EQU $FFFE ; Port A Bus Control Register
+M_PBC EQU $FFE0 ; Port B Control Register
+M_PBDDR EQU $FFE2 ; Port B Data Direction Register
+M_PBD EQU $FFE4 ; Port B Data Register
+M_PCC EQU $FFE1 ; Port C Control Register
+M_PCDDR EQU $FFE3 ; Port C Data Direction Register
+M_PCD EQU $FFE5 ; Port C Data Register
+
+M_HCR EQU $FFE8 ; Host Control Register
+M_HSR EQU $FFE9 ; Host Status Register
+M_HRX EQU $FFEB ; Host Receive Data Register
+M_HTX EQU $FFEB ; Host Transmit Data Register
+
+; SSI, Synchronous Serial Interface
+M_RX EQU $FFEF ; Serial Receive Data Register
+M_TX EQU $FFEF ; Serial Transmit Data Register
+M_CRA EQU $FFEC ; SSI Control Register A
+M_CRB EQU $FFED ; SSI Control Register B
+M_SR EQU $FFEE ; SSI Status Register
+M_TSR EQU $FFEE ; SSI Time Slot Register
+
+; Exception Processing
+M_IPR EQU $FFFF ; Interrupt Priority Register
+
+ org P:$0
+start jmp <$40
+
+ org P:$40
+; ; Zero 16384 DSP X and Y words
+; clr A #0,r0
+; clr B #0,r4
+; do #64,<_block1
+; rep #256
+; move A,X:(r0)+ B,Y:(r4)+
+;_block1 ; Zero (32768-512) Program words
+; clr A #512,r0
+; do #126,<_block2
+; rep #256
+; move A,P:(r0)+
+;_block2
+
+ ; Copy DSP program control
+ move #real,r0
+ move #upload,r1
+ do #upload_end-upload,<_copy
+ move P:(r0)+,x0
+ move x0,P:(r1)+
+_copy movep #>4,X:<<M_HCR
+ movep #>$c00,X:<<M_IPR
+ and #<$fe,mr
+ jmp upload
+
+real
+ org P:$7ea9
+upload
+ movep #>1,X:<<M_PBC
+ movep #>0,X:<<M_BCR
+
+next jclr #0,X:<<M_HSR,*
+ movep X:<<M_HRX,A
+ move #>3,x0
+ cmp x0,A #>1,x0
+ jeq <$0
+_get_address
+ jclr #0,X:<<M_HSR,_get_address
+ movep X:<<M_HRX,r0
+_get_length
+ jclr #0,X:<<M_HSR,_get_length
+ movep X:<<M_HRX,y0
+ cmp x0,A #>2,x0
+ jeq load_X
+ cmp x0,A
+ jeq load_Y
+
+load_P do y0,_load
+ jclr #0,X:<<M_HSR,*
+ movep X:<<M_HRX,P:(r0)+
+_load jmp next
+load_X do y0,_load
+ jclr #0,X:<<M_HSR,*
+ movep X:<<M_HRX,X:(r0)+
+_load jmp next
+load_Y do y0,_load
+ jclr #0,X:<<M_HSR,*
+ movep X:<<M_HRX,Y:(r0)+
+_load jmp next
+
+upload_end
+ end
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