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author | Ayaz Abdulla <aabdulla@nvidia.com> | 2009-05-01 01:41:50 +0000 |
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committer | David S. Miller <davem@davemloft.net> | 2009-05-01 15:30:45 -0700 |
commit | 88d7d8b00cdc3117150faab4c4ace6d464b71c22 (patch) | |
tree | 86e114a66f9fb2e76a892876101f8a5e4959ac20 /firmware/cis/3CXEM556.cis.ihex | |
parent | 1aec5bdfed91b50aedbcad43393bcb05033c7ef3 (diff) | |
download | op-kernel-dev-88d7d8b00cdc3117150faab4c4ace6d464b71c22.zip op-kernel-dev-88d7d8b00cdc3117150faab4c4ace6d464b71c22.tar.gz |
forcedeth: add clock gating feature <resend>
This patch adds new logic to support a clock gating feature found on the
latest set of chipsets. The clock gating is performed on the tx/rx
engines when the link is disconnected. Clock gating helps in reducing
power consumption.
* modified based on comments from netdev
Signed-off-by: Ayaz Abdulla <aabdulla@nvidia.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'firmware/cis/3CXEM556.cis.ihex')
0 files changed, 0 insertions, 0 deletions