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author | Catalin Marinas <catalin.marinas@arm.com> | 2013-04-29 15:07:45 -0700 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2013-04-29 15:54:34 -0700 |
commit | 104ad3b32d7a71941c8ab2dee78eea38e8a23309 (patch) | |
tree | 4b127633fdcdbce777a62dfd734c001b83a4959e /firmware/3com | |
parent | 6ee8630e02be6dd89926ca0fbc21af68b23dc087 (diff) | |
download | op-kernel-dev-104ad3b32d7a71941c8ab2dee78eea38e8a23309.zip op-kernel-dev-104ad3b32d7a71941c8ab2dee78eea38e8a23309.tar.gz |
arm: set the page table freeing ceiling to TASK_SIZE
ARM processors with LPAE enabled use 3 levels of page tables, with an
entry in the top level (pgd) covering 1GB of virtual space. Because of
the branch relocation limitations on ARM, the loadable modules are
mapped 16MB below PAGE_OFFSET, making the corresponding 1GB pgd shared
between kernel modules and user space.
If free_pgtables() is called with the default ceiling 0,
free_pgd_range() (and subsequently called functions) also frees the page
table shared between user space and kernel modules (which is normally
handled by the ARM-specific pgd_free() function). This patch changes
defines the ARM USER_PGTABLES_CEILING to TASK_SIZE when CONFIG_ARM_LPAE
is enabled.
Note that the pgd_free() function already checks the presence of the
shared pmd page allocated by pgd_alloc() and frees it, though with
ceiling 0 this wasn't necessary.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Hugh Dickins <hughd@google.com>
Cc: <stable@vger.kernel.org> [3.3+]
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Diffstat (limited to 'firmware/3com')
0 files changed, 0 insertions, 0 deletions