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| author | James Ralston <james.d.ralston@intel.com> | 2013-02-08 17:33:38 -0800 |
|---|---|---|
| committer | Samuel Ortiz <sameo@linux.intel.com> | 2013-02-14 00:26:51 +0100 |
| commit | 6e6680e3effbf7cff444405a990dbc355dc3a96f (patch) | |
| tree | f522c55cde57e2642a2b308b9dcde8b5d5d15296 /drivers | |
| parent | 5829e9b64e657560e840dc0ecfee177cb002cd69 (diff) | |
| download | op-kernel-dev-6e6680e3effbf7cff444405a990dbc355dc3a96f.zip op-kernel-dev-6e6680e3effbf7cff444405a990dbc355dc3a96f.tar.gz | |
mfd: lpc_ich: Add Device IDs for Intel Wellsburg PCH
This patch adds the Watchdog Timer Device IDs for the Intel Wellsburg PCH
Signed-off-by: James Ralston <james.d.ralston@intel.com>
Acked-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/mfd/lpc_ich.c | 38 |
1 files changed, 38 insertions, 0 deletions
diff --git a/drivers/mfd/lpc_ich.c b/drivers/mfd/lpc_ich.c index a0cfdf9..5c2ef41 100644 --- a/drivers/mfd/lpc_ich.c +++ b/drivers/mfd/lpc_ich.c @@ -50,6 +50,7 @@ * document number TBD : Panther Point * document number TBD : Lynx Point * document number TBD : Lynx Point-LP + * document number TBD : Wellsburg */ #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt @@ -205,6 +206,7 @@ enum lpc_chipsets { LPC_PPT, /* Panther Point */ LPC_LPT, /* Lynx Point */ LPC_LPT_LP, /* Lynx Point-LP */ + LPC_WBG, /* Wellsburg */ }; struct lpc_ich_info lpc_chipset_info[] = { @@ -485,6 +487,10 @@ struct lpc_ich_info lpc_chipset_info[] = { .name = "Lynx Point_LP", .iTCO_version = 2, }, + [LPC_WBG] = { + .name = "Wellsburg", + .iTCO_version = 2, + }, }; /* @@ -666,6 +672,38 @@ static DEFINE_PCI_DEVICE_TABLE(lpc_ich_ids) = { { PCI_VDEVICE(INTEL, 0x9c45), LPC_LPT_LP}, { PCI_VDEVICE(INTEL, 0x9c46), LPC_LPT_LP}, { PCI_VDEVICE(INTEL, 0x9c47), LPC_LPT_LP}, + { PCI_VDEVICE(INTEL, 0x8d40), LPC_WBG}, + { PCI_VDEVICE(INTEL, 0x8d41), LPC_WBG}, + { PCI_VDEVICE(INTEL, 0x8d42), LPC_WBG}, + { PCI_VDEVICE(INTEL, 0x8d43), LPC_WBG}, + { PCI_VDEVICE(INTEL, 0x8d44), LPC_WBG}, + { PCI_VDEVICE(INTEL, 0x8d45), LPC_WBG}, + { PCI_VDEVICE(INTEL, 0x8d46), LPC_WBG}, + { PCI_VDEVICE(INTEL, 0x8d47), LPC_WBG}, + { PCI_VDEVICE(INTEL, 0x8d48), LPC_WBG}, + { PCI_VDEVICE(INTEL, 0x8d49), LPC_WBG}, + { PCI_VDEVICE(INTEL, 0x8d4a), LPC_WBG}, + { PCI_VDEVICE(INTEL, 0x8d4b), LPC_WBG}, + { PCI_VDEVICE(INTEL, 0x8d4c), LPC_WBG}, + { PCI_VDEVICE(INTEL, 0x8d4d), LPC_WBG}, + { PCI_VDEVICE(INTEL, 0x8d4e), LPC_WBG}, + { PCI_VDEVICE(INTEL, 0x8d4f), LPC_WBG}, + { PCI_VDEVICE(INTEL, 0x8d50), LPC_WBG}, + { PCI_VDEVICE(INTEL, 0x8d51), LPC_WBG}, + { PCI_VDEVICE(INTEL, 0x8d52), LPC_WBG}, + { PCI_VDEVICE(INTEL, 0x8d53), LPC_WBG}, + { PCI_VDEVICE(INTEL, 0x8d54), LPC_WBG}, + { PCI_VDEVICE(INTEL, 0x8d55), LPC_WBG}, + { PCI_VDEVICE(INTEL, 0x8d56), LPC_WBG}, + { PCI_VDEVICE(INTEL, 0x8d57), LPC_WBG}, + { PCI_VDEVICE(INTEL, 0x8d58), LPC_WBG}, + { PCI_VDEVICE(INTEL, 0x8d59), LPC_WBG}, + { PCI_VDEVICE(INTEL, 0x8d5a), LPC_WBG}, + { PCI_VDEVICE(INTEL, 0x8d5b), LPC_WBG}, + { PCI_VDEVICE(INTEL, 0x8d5c), LPC_WBG}, + { PCI_VDEVICE(INTEL, 0x8d5d), LPC_WBG}, + { PCI_VDEVICE(INTEL, 0x8d5e), LPC_WBG}, + { PCI_VDEVICE(INTEL, 0x8d5f), LPC_WBG}, { 0, }, /* End of list */ }; MODULE_DEVICE_TABLE(pci, lpc_ich_ids); |
