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authorShobhit Kumar <shobhit.kumar@intel.com>2014-04-09 13:59:30 +0530
committerDaniel Vetter <daniel.vetter@ffwll.ch>2014-04-09 21:54:27 +0200
commit2095f9fc06f2222dd81866306f777cc5f52659ab (patch)
tree75cb7d8df0ff101d0844acc0e3073e0c79cacdd0 /drivers
parent113a047633eb7ee2a1d14cc258d7e5bca9215f73 (diff)
downloadop-kernel-dev-2095f9fc06f2222dd81866306f777cc5f52659ab.zip
op-kernel-dev-2095f9fc06f2222dd81866306f777cc5f52659ab.tar.gz
drm/i915: Program Rcomp and band gap reset everytime we resume from power gate
Signed-off-by: Shobhit Kumar <shobhit.kumar@intel.com> Reviewed-by: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/gpu/drm/i915/intel_dsi.c12
1 files changed, 9 insertions, 3 deletions
diff --git a/drivers/gpu/drm/i915/intel_dsi.c b/drivers/gpu/drm/i915/intel_dsi.c
index 3365664..7ceb8c6 100644
--- a/drivers/gpu/drm/i915/intel_dsi.c
+++ b/drivers/gpu/drm/i915/intel_dsi.c
@@ -110,6 +110,15 @@ static void intel_dsi_device_ready(struct intel_encoder *encoder)
DRM_DEBUG_KMS("\n");
+ mutex_lock(&dev_priv->dpio_lock);
+ /* program rcomp for compliance, reduce from 50 ohms to 45 ohms
+ * needed everytime after power gate */
+ vlv_flisdsi_write(dev_priv, 0x04, 0x0004);
+ mutex_unlock(&dev_priv->dpio_lock);
+
+ /* bandgap reset is needed after everytime we do power gate */
+ band_gap_reset(dev_priv);
+
val = I915_READ(MIPI_PORT_CTRL(pipe));
I915_WRITE(MIPI_PORT_CTRL(pipe), val | LP_OUTPUT_HOLD);
usleep_range(1000, 1500);
@@ -379,9 +388,6 @@ static void intel_dsi_mode_set(struct intel_encoder *intel_encoder)
DRM_DEBUG_KMS("pipe %c\n", pipe_name(pipe));
- /* XXX: Location of the call */
- band_gap_reset(dev_priv);
-
/* escape clock divider, 20MHz, shared for A and C. device ready must be
* off when doing this! txclkesc? */
tmp = I915_READ(MIPI_CTRL(0));
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