diff options
| author | Phil Sutter <n0-1@freewrt.org> | 2009-01-14 21:50:12 -0800 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2009-01-15 08:28:20 -0800 |
| commit | 60d3f9827ca455e7272681d67a37137c328d7012 (patch) | |
| tree | 19858fc9cb3d98ad2650a7f6bebf8e5d52166ad0 /drivers | |
| parent | 4676f63d4c1e2e3530e42cb39bf88a1c1d4d78a5 (diff) | |
| download | op-kernel-dev-60d3f9827ca455e7272681d67a37137c328d7012.zip op-kernel-dev-60d3f9827ca455e7272681d67a37137c328d7012.tar.gz | |
korina: do tx at the right position
Triggering TX before the write to the DMA status mask register leads to
transferring packets with maximum payload no matter what the actual
packet size is.
While here, also trigger RX scheduling after writing the DMA status mask
register, like it was in the original driver before it was sent
upstream.
Signed-off-by: Phil Sutter <n0-1@freewrt.org>
Acked-by: Florian Fainelli <florian@openwrt.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/net/korina.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/drivers/net/korina.c b/drivers/net/korina.c index 7aa05f8..dced5e7 100644 --- a/drivers/net/korina.c +++ b/drivers/net/korina.c @@ -330,13 +330,13 @@ static irqreturn_t korina_rx_dma_interrupt(int irq, void *dev_id) dmas = readl(&lp->rx_dma_regs->dmas); if (dmas & (DMA_STAT_DONE | DMA_STAT_HALT | DMA_STAT_ERR)) { - netif_rx_schedule(&lp->napi); - dmasm = readl(&lp->rx_dma_regs->dmasm); writel(dmasm | (DMA_STAT_DONE | DMA_STAT_HALT | DMA_STAT_ERR), &lp->rx_dma_regs->dmasm); + netif_rx_schedule(&lp->napi); + if (dmas & DMA_STAT_ERR) printk(KERN_ERR DRV_NAME "%s: DMA error\n", dev->name); @@ -623,12 +623,12 @@ korina_tx_dma_interrupt(int irq, void *dev_id) dmas = readl(&lp->tx_dma_regs->dmas); if (dmas & (DMA_STAT_FINI | DMA_STAT_ERR)) { - korina_tx(dev); - dmasm = readl(&lp->tx_dma_regs->dmasm); writel(dmasm | (DMA_STAT_FINI | DMA_STAT_ERR), &lp->tx_dma_regs->dmasm); + korina_tx(dev); + if (lp->tx_chain_status == desc_filled && (readl(&(lp->tx_dma_regs->dmandptr)) == 0)) { writel(CPHYSADDR(&lp->td_ring[lp->tx_chain_head]), |
