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authorStephen Hemminger <shemminger@linux-foundation.org>2007-09-24 19:34:51 -0700
committerJeff Garzik <jeff@garzik.org>2007-09-25 00:04:17 -0400
commit6d3105d5388c359882068b161b431ab3db4b3721 (patch)
tree9472cc9cd41844180bc6f54f94fab15f4ac9ee81 /drivers
parent4942de4a0e914f205d351a81873f4f63986bcc3c (diff)
downloadop-kernel-dev-6d3105d5388c359882068b161b431ab3db4b3721.zip
op-kernel-dev-6d3105d5388c359882068b161b431ab3db4b3721.tar.gz
sky2: FE+ Phy initialization
One more snippet of PHY initialization required for FE+ chips. Discovered in latest sk98lin 10.21.1.3 driver. Please apply to 2.6.23. Signed-off-by: Stephen Hemminger <shemminger@linux-foundation.org> Signed-off-by: Jeff Garzik <jeff@garzik.org>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/net/sky2.c10
1 files changed, 10 insertions, 0 deletions
diff --git a/drivers/net/sky2.c b/drivers/net/sky2.c
index eaffe55..f3a8243 100644
--- a/drivers/net/sky2.c
+++ b/drivers/net/sky2.c
@@ -338,6 +338,16 @@ static void sky2_phy_init(struct sky2_hw *hw, unsigned port)
if (!(hw->flags & SKY2_HW_GIGABIT)) {
/* enable automatic crossover */
ctrl |= PHY_M_PC_MDI_XMODE(PHY_M_PC_ENA_AUTO) >> 1;
+
+ if (hw->chip_id == CHIP_ID_YUKON_FE_P &&
+ hw->chip_rev == CHIP_REV_YU_FE2_A0) {
+ u16 spec;
+
+ /* Enable Class A driver for FE+ A0 */
+ spec = gm_phy_read(hw, port, PHY_MARV_FE_SPEC_2);
+ spec |= PHY_M_FESC_SEL_CL_A;
+ gm_phy_write(hw, port, PHY_MARV_FE_SPEC_2, spec);
+ }
} else {
/* disable energy detect */
ctrl &= ~PHY_M_PC_EN_DET_MSK;
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