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authorTony Cheng <tony.cheng@amd.com>2016-12-22 14:54:50 -0500
committerAlex Deucher <alexander.deucher@amd.com>2017-09-26 17:07:25 -0400
commitc89a58cd0d1cc940a29a00cc03e441f97fab56e1 (patch)
treea1a105f0ddc0f517943ff09882696b1753b0f88e /drivers
parent6a1f8cabc651c20bc00d211aef24ea9174141515 (diff)
downloadop-kernel-dev-c89a58cd0d1cc940a29a00cc03e441f97fab56e1.zip
op-kernel-dev-c89a58cd0d1cc940a29a00cc03e441f97fab56e1.tar.gz
drm/amd/display: Allow multiple instance of DTO regs
Signed-off-by: Tony Cheng <tony.cheng@amd.com> Reviewed-by: Jordan Lazare <Jordan.Lazare@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h10
1 files changed, 7 insertions, 3 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h b/drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h
index 8ee0071..28984c79 100644
--- a/drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h
+++ b/drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h
@@ -76,9 +76,13 @@ struct dce110_clk_src_regs {
uint32_t RESYNC_CNTL;
uint32_t PIXCLK_RESYNC_CNTL;
uint32_t PLL_CNTL;
- uint32_t PHASE;
- uint32_t MODULO;
- uint32_t PIXEL_RATE_CNTL;
+
+ /* below are for DTO.
+ * todo: should probably use different struct to not waste space
+ */
+ uint32_t PHASE[4];
+ uint32_t MODULO[4];
+ uint32_t PIXEL_RATE_CNTL[4];
};
struct dce110_clk_src {
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