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author | Stephen Boyd <sboyd@codeaurora.org> | 2018-01-26 16:42:03 -0800 |
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committer | Stephen Boyd <sboyd@codeaurora.org> | 2018-01-26 16:43:14 -0800 |
commit | 716d9b1d4a88493ec3e52957cc1026d32534ee67 (patch) | |
tree | f1f9c9d73a5527e23e1a476cb2acbdad9e81f09f /drivers | |
parent | 0003046477a0c0038bab8c899181faa2e7d86d40 (diff) | |
parent | 12a26c298d2a8b1cab498533fa65198e49e3afd3 (diff) | |
download | op-kernel-dev-716d9b1d4a88493ec3e52957cc1026d32534ee67.zip op-kernel-dev-716d9b1d4a88493ec3e52957cc1026d32534ee67.tar.gz |
Merge branch 'clk-divider-container' into clk-next
* clk-divider-container:
clk: divider: fix incorrect usage of container_of
Plus fixup sprd/div.c to pass the width too.
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/clk/clk-divider.c | 7 | ||||
-rw-r--r-- | drivers/clk/hisilicon/clkdivider-hi6220.c | 2 | ||||
-rw-r--r-- | drivers/clk/nxp/clk-lpc32xx.c | 2 | ||||
-rw-r--r-- | drivers/clk/qcom/clk-regmap-divider.c | 2 | ||||
-rw-r--r-- | drivers/clk/sprd/div.c | 3 | ||||
-rw-r--r-- | drivers/clk/sunxi-ng/ccu_div.c | 2 | ||||
-rw-r--r-- | drivers/gpu/drm/msm/dsi/pll/dsi_pll_14nm.c | 2 | ||||
-rw-r--r-- | drivers/rtc/rtc-ac100.c | 6 |
8 files changed, 14 insertions, 12 deletions
diff --git a/drivers/clk/clk-divider.c b/drivers/clk/clk-divider.c index 4ed516c..b49942b 100644 --- a/drivers/clk/clk-divider.c +++ b/drivers/clk/clk-divider.c @@ -118,12 +118,11 @@ static unsigned int _get_val(const struct clk_div_table *table, unsigned long divider_recalc_rate(struct clk_hw *hw, unsigned long parent_rate, unsigned int val, const struct clk_div_table *table, - unsigned long flags) + unsigned long flags, unsigned long width) { - struct clk_divider *divider = to_clk_divider(hw); unsigned int div; - div = _get_div(table, val, flags, divider->width); + div = _get_div(table, val, flags, width); if (!div) { WARN(!(flags & CLK_DIVIDER_ALLOW_ZERO), "%s: Zero divisor and CLK_DIVIDER_ALLOW_ZERO not set\n", @@ -145,7 +144,7 @@ static unsigned long clk_divider_recalc_rate(struct clk_hw *hw, val &= div_mask(divider->width); return divider_recalc_rate(hw, parent_rate, val, divider->table, - divider->flags); + divider->flags, divider->width); } static bool _is_valid_table_div(const struct clk_div_table *table, diff --git a/drivers/clk/hisilicon/clkdivider-hi6220.c b/drivers/clk/hisilicon/clkdivider-hi6220.c index a1c1f68..9f46cf9 100644 --- a/drivers/clk/hisilicon/clkdivider-hi6220.c +++ b/drivers/clk/hisilicon/clkdivider-hi6220.c @@ -56,7 +56,7 @@ static unsigned long hi6220_clkdiv_recalc_rate(struct clk_hw *hw, val &= div_mask(dclk->width); return divider_recalc_rate(hw, parent_rate, val, dclk->table, - CLK_DIVIDER_ROUND_CLOSEST); + CLK_DIVIDER_ROUND_CLOSEST, dclk->width); } static long hi6220_clkdiv_round_rate(struct clk_hw *hw, unsigned long rate, diff --git a/drivers/clk/nxp/clk-lpc32xx.c b/drivers/clk/nxp/clk-lpc32xx.c index b669a5c..f5d815f 100644 --- a/drivers/clk/nxp/clk-lpc32xx.c +++ b/drivers/clk/nxp/clk-lpc32xx.c @@ -956,7 +956,7 @@ static unsigned long clk_divider_recalc_rate(struct clk_hw *hw, val &= div_mask(divider->width); return divider_recalc_rate(hw, parent_rate, val, divider->table, - divider->flags); + divider->flags, divider->width); } static long clk_divider_round_rate(struct clk_hw *hw, unsigned long rate, diff --git a/drivers/clk/qcom/clk-regmap-divider.c b/drivers/clk/qcom/clk-regmap-divider.c index 6cf9005..4e9b8c2c8 100644 --- a/drivers/clk/qcom/clk-regmap-divider.c +++ b/drivers/clk/qcom/clk-regmap-divider.c @@ -82,7 +82,7 @@ static unsigned long div_recalc_rate(struct clk_hw *hw, div &= BIT(divider->width) - 1; return divider_recalc_rate(hw, parent_rate, div, NULL, - CLK_DIVIDER_ROUND_CLOSEST); + CLK_DIVIDER_ROUND_CLOSEST, divider->width); } const struct clk_ops clk_regmap_div_ops = { diff --git a/drivers/clk/sprd/div.c b/drivers/clk/sprd/div.c index 887a863..7621a1d 100644 --- a/drivers/clk/sprd/div.c +++ b/drivers/clk/sprd/div.c @@ -39,7 +39,8 @@ unsigned long sprd_div_helper_recalc_rate(struct sprd_clk_common *common, val = reg >> div->shift; val &= (1 << div->width) - 1; - return divider_recalc_rate(&common->hw, parent_rate, val, NULL, 0); + return divider_recalc_rate(&common->hw, parent_rate, val, NULL, 0, + div->width); } EXPORT_SYMBOL_GPL(sprd_div_helper_recalc_rate); diff --git a/drivers/clk/sunxi-ng/ccu_div.c b/drivers/clk/sunxi-ng/ccu_div.c index baa3cf9..302a18e 100644 --- a/drivers/clk/sunxi-ng/ccu_div.c +++ b/drivers/clk/sunxi-ng/ccu_div.c @@ -71,7 +71,7 @@ static unsigned long ccu_div_recalc_rate(struct clk_hw *hw, parent_rate); val = divider_recalc_rate(hw, parent_rate, val, cd->div.table, - cd->div.flags); + cd->div.flags, cd->div.width); if (cd->common.features & CCU_FEATURE_FIXED_POSTDIV) val /= cd->fixed_post_div; diff --git a/drivers/gpu/drm/msm/dsi/pll/dsi_pll_14nm.c b/drivers/gpu/drm/msm/dsi/pll/dsi_pll_14nm.c index fe15aa6..71fe60e 100644 --- a/drivers/gpu/drm/msm/dsi/pll/dsi_pll_14nm.c +++ b/drivers/gpu/drm/msm/dsi/pll/dsi_pll_14nm.c @@ -698,7 +698,7 @@ static unsigned long dsi_pll_14nm_postdiv_recalc_rate(struct clk_hw *hw, val &= div_mask(width); return divider_recalc_rate(hw, parent_rate, val, NULL, - postdiv->flags); + postdiv->flags, width); } static long dsi_pll_14nm_postdiv_round_rate(struct clk_hw *hw, diff --git a/drivers/rtc/rtc-ac100.c b/drivers/rtc/rtc-ac100.c index 9e33618..0282ccc 100644 --- a/drivers/rtc/rtc-ac100.c +++ b/drivers/rtc/rtc-ac100.c @@ -137,13 +137,15 @@ static unsigned long ac100_clkout_recalc_rate(struct clk_hw *hw, div = (reg >> AC100_CLKOUT_PRE_DIV_SHIFT) & ((1 << AC100_CLKOUT_PRE_DIV_WIDTH) - 1); prate = divider_recalc_rate(hw, prate, div, - ac100_clkout_prediv, 0); + ac100_clkout_prediv, 0, + AC100_CLKOUT_PRE_DIV_WIDTH); } div = (reg >> AC100_CLKOUT_DIV_SHIFT) & (BIT(AC100_CLKOUT_DIV_WIDTH) - 1); return divider_recalc_rate(hw, prate, div, NULL, - CLK_DIVIDER_POWER_OF_TWO); + CLK_DIVIDER_POWER_OF_TWO, + AC100_CLKOUT_DIV_WIDTH); } static long ac100_clkout_round_rate(struct clk_hw *hw, unsigned long rate, |