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authorTomi Valkeinen <tomi.valkeinen@ti.com>2015-01-21 09:38:16 +0200
committerTomi Valkeinen <tomi.valkeinen@ti.com>2015-01-27 13:35:37 +0200
commit4d073292a74b31ea00443d7778a95c209140aa42 (patch)
tree663896b235d0e85346fd9dc88794fdf4a9bfd14a /drivers
parent070a178331d056934fccf00bdc001eb9647ea029 (diff)
downloadop-kernel-dev-4d073292a74b31ea00443d7778a95c209140aa42.zip
op-kernel-dev-4d073292a74b31ea00443d7778a95c209140aa42.tar.gz
fbdev: fix CVT vertical front and back porch values
CVT v1.1 spec says: "the vertical front porch shall in all cases be fixed to 3 lines". The code in fbcvt.c instead sets the _back_ porch to 3 (plus margin). After swapping cvt.v_front_porch and cvt.v_back_porch the resulting timings were in line with CVT timings in VESA DMT spec. The bug seems to be more than 9 years old, but I presume it has not been noticed as usually the video timings come from the EDID or from the timing tables in fbdev, and probably swapped values for vfp and vbp work fine for most of the displays. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com> Acked-by: David Ung <davidu@nvidia.com> Cc: Antonino A. Daplas <adaplas@gmail.com>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/video/fbdev/core/fbcvt.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/video/fbdev/core/fbcvt.c b/drivers/video/fbdev/core/fbcvt.c
index 7cb715d..55d2bd0 100644
--- a/drivers/video/fbdev/core/fbcvt.c
+++ b/drivers/video/fbdev/core/fbcvt.c
@@ -369,9 +369,9 @@ int fb_find_mode_cvt(struct fb_videomode *mode, int margins, int rb)
cvt.h_back_porch = cvt.hblank/2 + cvt.h_margin;
cvt.h_front_porch = cvt.hblank - cvt.hsync - cvt.h_back_porch +
2 * cvt.h_margin;
- cvt.v_back_porch = 3 + cvt.v_margin;
- cvt.v_front_porch = cvt.vtotal - cvt.yres/cvt.interlace -
- cvt.v_back_porch - cvt.vsync;
+ cvt.v_front_porch = 3 + cvt.v_margin;
+ cvt.v_back_porch = cvt.vtotal - cvt.yres/cvt.interlace -
+ cvt.v_front_porch - cvt.vsync;
fb_cvt_print_name(&cvt);
fb_cvt_convert_to_mode(&cvt, mode);
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