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authorAxel Lin <axel.lin@ingics.com>2014-04-15 10:54:11 +0800
committerMatthew Garrett <matthew.garrett@nebula.com>2014-06-09 17:39:58 -0400
commit21a3542753a63091bc4700525e6096d76fe32f62 (patch)
tree9aba992cb4cb5fb2118c94e76bd89c653e3c6b73 /drivers
parent963649d735c8b6eb0f97e82c54f02426ff3f1f45 (diff)
downloadop-kernel-dev-21a3542753a63091bc4700525e6096d76fe32f62.zip
op-kernel-dev-21a3542753a63091bc4700525e6096d76fe32f62.tar.gz
platform-drivers-x86: intel_pmic_gpio: Fix off-by-one valid offset range check
Only pin 0-7 support input, so the valid offset range should be 0 ~ 7. Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Matthew Garrett <matthew.garrett@nebula.com>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/platform/x86/intel_pmic_gpio.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/platform/x86/intel_pmic_gpio.c b/drivers/platform/x86/intel_pmic_gpio.c
index 2805988..40929e4 100644
--- a/drivers/platform/x86/intel_pmic_gpio.c
+++ b/drivers/platform/x86/intel_pmic_gpio.c
@@ -91,7 +91,7 @@ static void pmic_program_irqtype(int gpio, int type)
static int pmic_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
{
- if (offset > 8) {
+ if (offset >= 8) {
pr_err("only pin 0-7 support input\n");
return -1;/* we only have 8 GPIO can use as input */
}
@@ -130,7 +130,7 @@ static int pmic_gpio_get(struct gpio_chip *chip, unsigned offset)
int ret;
/* we only have 8 GPIO pins we can use as input */
- if (offset > 8)
+ if (offset >= 8)
return -EOPNOTSUPP;
ret = intel_scu_ipc_ioread8(GPIO0 + offset, &r);
if (ret < 0)
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