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authorRicardo Neri <ricardo.neri@ti.com>2012-01-31 13:36:06 -0600
committerTomi Valkeinen <tomi.valkeinen@ti.com>2012-02-21 09:40:15 +0200
commitd8989d96eb35335e4e464369da7bdb28e8c84a9f (patch)
tree2f10cc942ab4260f96ac71325ce6cf9b38e93700 /drivers/video/omap2/omapfb/omapfb-main.c
parent709881942d2af6944a59d1b90e73ba8f4d76bd82 (diff)
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OMAPDSS: HDMI: Implement initialization of MCLK
When the MCLK is used to drive the Audio Clock Regeneration packets, the initialization procedure is to set ACR_CTRL[2] to 0 and then back again to 1. Also, devices that do not support the MCLK, use the TMDS clock directly by leaving ACR_CTRL[2] set to 0. The MLCK clock divisor, mclk_mode, is configured only if MLCK is used. Such configuration is no longer related to the CTS mode as in some silicon revisions CTS SW-mode is used along with the MCLK. Signed-off-by: Ricardo Neri <ricardo.neri@ti.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Diffstat (limited to 'drivers/video/omap2/omapfb/omapfb-main.c')
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