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author | Chandrabhanu Mahapatra <cmahapatra@ti.com> | 2012-07-10 12:27:21 +0530 |
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committer | Tomi Valkeinen <tomi.valkeinen@ti.com> | 2012-08-22 11:43:03 +0300 |
commit | ba1bc5bb1da5151f94031909ff775b0b4a1871c1 (patch) | |
tree | 232032aa604eac69f15cfc90606bae8fdfc39d2e /drivers/video/omap2/dss/dss.c | |
parent | dcbe765b4f7c097ceab7dabe3af29e2a02529ebf (diff) | |
download | op-kernel-dev-ba1bc5bb1da5151f94031909ff775b0b4a1871c1.zip op-kernel-dev-ba1bc5bb1da5151f94031909ff775b0b4a1871c1.tar.gz |
OMAPDSS: DSS: Remove redundant functions
Functions dss_calc_clock_rates() and dss_get_clock_div() are removed as these
functions have become redundant and no longer used.
Signed-off-by: Chandrabhanu Mahapatra <cmahapatra@ti.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Diffstat (limited to 'drivers/video/omap2/dss/dss.c')
-rw-r--r-- | drivers/video/omap2/dss/dss.c | 45 |
1 files changed, 0 insertions, 45 deletions
diff --git a/drivers/video/omap2/dss/dss.c b/drivers/video/omap2/dss/dss.c index 92353be..e2e0fa4 100644 --- a/drivers/video/omap2/dss/dss.c +++ b/drivers/video/omap2/dss/dss.c @@ -431,31 +431,6 @@ enum omap_dss_clk_source dss_get_lcd_clk_source(enum omap_channel channel) } } -/* calculate clock rates using dividers in cinfo */ -int dss_calc_clock_rates(struct dss_clock_info *cinfo) -{ - if (dss.dpll4_m4_ck) { - unsigned long prate; - u16 fck_div_max = 16; - - if (cpu_is_omap3630() || cpu_is_omap44xx()) - fck_div_max = 32; - - if (cinfo->fck_div > fck_div_max || cinfo->fck_div == 0) - return -EINVAL; - - prate = clk_get_rate(clk_get_parent(dss.dpll4_m4_ck)); - - cinfo->fck = prate / cinfo->fck_div; - } else { - if (cinfo->fck_div != 0) - return -EINVAL; - cinfo->fck = clk_get_rate(dss.dss_clk); - } - - return 0; -} - int dss_set_clock_div(struct dss_clock_info *cinfo) { if (dss.dpll4_m4_ck) { @@ -478,26 +453,6 @@ int dss_set_clock_div(struct dss_clock_info *cinfo) return 0; } -int dss_get_clock_div(struct dss_clock_info *cinfo) -{ - cinfo->fck = clk_get_rate(dss.dss_clk); - - if (dss.dpll4_m4_ck) { - unsigned long prate; - - prate = clk_get_rate(clk_get_parent(dss.dpll4_m4_ck)); - - if (cpu_is_omap3630() || cpu_is_omap44xx()) - cinfo->fck_div = prate / (cinfo->fck); - else - cinfo->fck_div = prate / (cinfo->fck / 2); - } else { - cinfo->fck_div = 0; - } - - return 0; -} - unsigned long dss_get_dpll4_rate(void) { if (dss.dpll4_m4_ck) |