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author | Tomi Valkeinen <tomi.valkeinen@ti.com> | 2013-11-14 11:38:25 +0200 |
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committer | Tomi Valkeinen <tomi.valkeinen@ti.com> | 2013-12-30 16:14:15 +0200 |
commit | 29fceeebb6ad55dd0e27f6f7b8f10aa039315cde (patch) | |
tree | ca9e3d9b6ab73562b014476b68d2f81c79790ddc /drivers/video/omap2/dss/dispc.h | |
parent | 7a53df2c08119c1a7008d8480205fb3e6859c721 (diff) | |
download | op-kernel-dev-29fceeebb6ad55dd0e27f6f7b8f10aa039315cde.zip op-kernel-dev-29fceeebb6ad55dd0e27f6f7b8f10aa039315cde.tar.gz |
OMAPDSS: DISPC: Add MFLAG defines
OMAP5 has MFLAG feature in DISPC. Add the register definition and dump
it. The register is not used yet, though.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Diffstat (limited to 'drivers/video/omap2/dss/dispc.h')
-rw-r--r-- | drivers/video/omap2/dss/dispc.h | 20 |
1 files changed, 20 insertions, 0 deletions
diff --git a/drivers/video/omap2/dss/dispc.h b/drivers/video/omap2/dss/dispc.h index de4863d..78edb44 100644 --- a/drivers/video/omap2/dss/dispc.h +++ b/drivers/video/omap2/dss/dispc.h @@ -40,6 +40,7 @@ #define DISPC_CONTROL3 0x0848 #define DISPC_CONFIG3 0x084C #define DISPC_MSTANDBY_CTRL 0x0858 +#define DISPC_GLOBAL_MFLAG_ATTRIBUTE 0x085C /* DISPC overlay registers */ #define DISPC_OVL_BA0(n) (DISPC_OVL_BASE(n) + \ @@ -100,6 +101,8 @@ DISPC_FIR_COEF_V2_OFFSET(n, i)) #define DISPC_OVL_PRELOAD(n) (DISPC_OVL_BASE(n) + \ DISPC_PRELOAD_OFFSET(n)) +#define DISPC_OVL_MFLAG_THRESHOLD(n) (DISPC_OVL_BASE(n) + \ + DISPC_MFLAG_THRESHOLD_OFFSET(n)) /* DISPC up/downsampling FIR filter coefficient structure */ struct dispc_coef { @@ -894,4 +897,21 @@ static inline u16 DISPC_PRELOAD_OFFSET(enum omap_plane plane) return 0; } } + +static inline u16 DISPC_MFLAG_THRESHOLD_OFFSET(enum omap_plane plane) +{ + switch (plane) { + case OMAP_DSS_GFX: + return 0x0860; + case OMAP_DSS_VIDEO1: + return 0x0864; + case OMAP_DSS_VIDEO2: + return 0x0868; + case OMAP_DSS_VIDEO3: + return 0x086c; + default: + BUG(); + return 0; + } +} #endif |