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authorDave Airlie <airlied@linux.ie>2006-03-31 17:08:52 +1000
committerDave Airlie <airlied@linux.ie>2006-04-03 11:43:29 +1000
commit3aff13cfb8810cc228e8fdcb92103ed0b11ee38e (patch)
treef2fe6212fcee1952a81022c33afa9dbc836c2e71 /drivers/video/intelfb/intelfbhw.h
parent46f60b8e67e6fceede851dc69cdee2d7c0de27b9 (diff)
downloadop-kernel-dev-3aff13cfb8810cc228e8fdcb92103ed0b11ee38e.zip
op-kernel-dev-3aff13cfb8810cc228e8fdcb92103ed0b11ee38e.tar.gz
intelfb: fixup p calculation
This fixes up the p calculation of p1 and p2 for the i9xx chipsets. This seems to work a lot better for lower pixel clocks.. Signed-off-by: Dave Airlie <airlied@linux.ie>
Diffstat (limited to 'drivers/video/intelfb/intelfbhw.h')
-rw-r--r--drivers/video/intelfb/intelfbhw.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/video/intelfb/intelfbhw.h b/drivers/video/intelfb/intelfbhw.h
index a3ec8f9..10acda0 100644
--- a/drivers/video/intelfb/intelfbhw.h
+++ b/drivers/video/intelfb/intelfbhw.h
@@ -133,6 +133,7 @@
#define DPLL_VGA_MODE_DISABLE (1 << 28)
#define DPLL_P2_MASK 1
#define DPLL_P2_SHIFT 23
+#define DPLL_I9XX_P2_SHIFT 24
#define DPLL_P1_FORCE_DIV2 (1 << 21)
#define DPLL_P1_MASK 0x1f
#define DPLL_P1_SHIFT 16
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