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author | Tomi Valkeinen <tomi.valkeinen@ti.com> | 2014-09-15 15:40:47 +0300 |
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committer | Tomi Valkeinen <tomi.valkeinen@ti.com> | 2014-11-12 13:40:25 +0200 |
commit | 33f13120e59cb4eddedc09039d8602d94aa864b4 (patch) | |
tree | 08de9e1a6ee2fb9eff526e442d14ec73bf83f956 /drivers/video/fbdev/omap2/dss/hdmi5.c | |
parent | 31dd0f4be428c7059c697332e27417cb6b08087d (diff) | |
download | op-kernel-dev-33f13120e59cb4eddedc09039d8602d94aa864b4.zip op-kernel-dev-33f13120e59cb4eddedc09039d8602d94aa864b4.tar.gz |
OMAPDSS: HDMI: rewrite HDMI PLL calculation code
The code calculating HDMI PLL parameters has always been very confusing.
Now that we are implementing a common PLL library for the DSS, it's
important that the PLL code is understandable.
This patch rewrites the calculation code, and removes a few hacks that
were used there.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Diffstat (limited to 'drivers/video/fbdev/omap2/dss/hdmi5.c')
-rw-r--r-- | drivers/video/fbdev/omap2/dss/hdmi5.c | 9 |
1 files changed, 3 insertions, 6 deletions
diff --git a/drivers/video/fbdev/omap2/dss/hdmi5.c b/drivers/video/fbdev/omap2/dss/hdmi5.c index c053d69..e8ca910 100644 --- a/drivers/video/fbdev/omap2/dss/hdmi5.c +++ b/drivers/video/fbdev/omap2/dss/hdmi5.c @@ -198,7 +198,6 @@ static int hdmi_power_on_full(struct omap_dss_device *dssdev) int r; struct omap_video_timings *p; struct omap_overlay_manager *mgr = hdmi.output.manager; - unsigned long phy; r = hdmi_power_on_core(dssdev); if (r) @@ -208,10 +207,7 @@ static int hdmi_power_on_full(struct omap_dss_device *dssdev) DSSDBG("hdmi_power_on x_res= %d y_res = %d\n", p->x_res, p->y_res); - /* the functions below use kHz pixel clock. TODO: change to Hz */ - phy = p->pixelclock / 1000; - - hdmi_pll_compute(&hdmi.pll, clk_get_rate(hdmi.sys_clk), phy); + hdmi_pll_compute(&hdmi.pll, clk_get_rate(hdmi.sys_clk), p->pixelclock); /* disable and clear irqs */ hdmi_wp_clear_irqenable(&hdmi.wp, 0xffffffff); @@ -225,7 +221,8 @@ static int hdmi_power_on_full(struct omap_dss_device *dssdev) goto err_pll_enable; } - r = hdmi_phy_configure(&hdmi.phy, &hdmi.cfg); + r = hdmi_phy_configure(&hdmi.phy, hdmi.pll.info.clkdco, + hdmi.pll.info.clkout); if (r) { DSSDBG("Failed to start PHY\n"); goto err_phy_cfg; |