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author | Jan Andersson <jan@gaisler.com> | 2011-05-06 12:00:17 +0200 |
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committer | Greg Kroah-Hartman <gregkh@suse.de> | 2011-05-06 18:24:01 -0700 |
commit | d3219d1c4c9ab7cd959f8f294420faf5f936cf55 (patch) | |
tree | d2ddd049bd7f872cda2050d94868f22a9a2f2b35 /drivers/usb/host/uhci-hcd.h | |
parent | 9faa091a409851ac6b3812164d53644074bc89b1 (diff) | |
download | op-kernel-dev-d3219d1c4c9ab7cd959f8f294420faf5f936cf55.zip op-kernel-dev-d3219d1c4c9ab7cd959f8f294420faf5f936cf55.tar.gz |
USB: UHCI: Support non-PCI host controllers
This patch is part of a series that extend the UHCI HCD to support
non-PCI host controllers.
This patch also extends the uhci_{read,write}* functions to allow accesses
to registers not mapped into PCI I/O space. This extension also includes
the addition of a void __iomem pointer to the uhci structure.
A new Kconfig option is added to signal that the system has a non-PCI HC.
If this Kconfig option is set, uhci-hcd.c will include generic reset functions
for systems that do not make use of keyboard and mouse legacy support. PCI
controllers will still always use the reset functions from pci-quirks
This patch is followed by a patch that adds bus glue for the first non-PCI
UHCI HC.
Signed-off-by: Jan Andersson <jan@gaisler.com>
Acked-by: Alan Stern <stern@rowland.harvard.edu>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Diffstat (limited to 'drivers/usb/host/uhci-hcd.h')
-rw-r--r-- | drivers/usb/host/uhci-hcd.h | 65 |
1 files changed, 65 insertions, 0 deletions
diff --git a/drivers/usb/host/uhci-hcd.h b/drivers/usb/host/uhci-hcd.h index a6de241..a4e64d0 100644 --- a/drivers/usb/host/uhci-hcd.h +++ b/drivers/usb/host/uhci-hcd.h @@ -380,6 +380,9 @@ struct uhci_hcd { /* Grabbed from PCI */ unsigned long io_addr; + /* Used when registers are memory mapped */ + void __iomem *regs; + struct dma_pool *qh_pool; struct dma_pool *td_pool; @@ -481,6 +484,14 @@ struct urb_priv { #define PCI_VENDOR_ID_GENESYS 0x17a0 #define PCI_DEVICE_ID_GL880S_UHCI 0x8083 +/* + * Functions used to access controller registers. The UCHI spec says that host + * controller I/O registers are mapped into PCI I/O space. For non-PCI hosts + * we use memory mapped registers. + */ + +#if !defined(CONFIG_USB_UHCI_SUPPORT_NON_PCI_HC) +/* Support PCI only */ static inline u32 uhci_readl(struct uhci_hcd *uhci, int reg) { return inl(uhci->io_addr + reg); @@ -511,4 +522,58 @@ static inline void uhci_writeb(struct uhci_hcd *uhci, u8 val, int reg) outb(val, uhci->io_addr + reg); } +#else +/* Support PCI and non-PCI host controllers */ + +#define uhci_has_pci_registers(u) ((u)->io_addr != 0) + +static inline u32 uhci_readl(struct uhci_hcd *uhci, int reg) +{ + if (uhci_has_pci_registers(uhci)) + return inl(uhci->io_addr + reg); + else + return readl(uhci->regs + reg); +} + +static inline void uhci_writel(struct uhci_hcd *uhci, u32 val, int reg) +{ + if (uhci_has_pci_registers(uhci)) + outl(val, uhci->io_addr + reg); + else + writel(val, uhci->regs + reg); +} + +static inline u16 uhci_readw(struct uhci_hcd *uhci, int reg) +{ + if (uhci_has_pci_registers(uhci)) + return inw(uhci->io_addr + reg); + else + return readw(uhci->regs + reg); +} + +static inline void uhci_writew(struct uhci_hcd *uhci, u16 val, int reg) +{ + if (uhci_has_pci_registers(uhci)) + outw(val, uhci->io_addr + reg); + else + writew(val, uhci->regs + reg); +} + +static inline u8 uhci_readb(struct uhci_hcd *uhci, int reg) +{ + if (uhci_has_pci_registers(uhci)) + return inb(uhci->io_addr + reg); + else + return readb(uhci->regs + reg); +} + +static inline void uhci_writeb(struct uhci_hcd *uhci, u8 val, int reg) +{ + if (uhci_has_pci_registers(uhci)) + outb(val, uhci->io_addr + reg); + else + writeb(val, uhci->regs + reg); +} +#endif /* !defined(CONFIG_USB_UHCI_SUPPORT_NON_PCI_HC) */ + #endif |