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| author | Stephen Warren <swarren@nvidia.com> | 2013-11-06 16:50:44 -0700 |
|---|---|---|
| committer | Stephen Warren <swarren@nvidia.com> | 2013-12-11 16:44:28 -0700 |
| commit | d3d654ef230d8b8370e1b2820589521282c868d8 (patch) | |
| tree | 139ed479cc4f2600c05b1197c38d77b052a6c25a /drivers/tty/serial | |
| parent | a915d150f68d8fd8ad72de6d9d4d7be26813b214 (diff) | |
| download | op-kernel-dev-d3d654ef230d8b8370e1b2820589521282c868d8.zip op-kernel-dev-d3d654ef230d8b8370e1b2820589521282c868d8.tar.gz | |
serial: tegra: use reset framework
Tegra's clock driver now provides an implementation of the common
reset API (include/linux/reset.h). Use this instead of the old Tegra-
specific API; that will soon be removed.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Reviewed-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'drivers/tty/serial')
| -rw-r--r-- | drivers/tty/serial/serial-tegra.c | 14 |
1 files changed, 10 insertions, 4 deletions
diff --git a/drivers/tty/serial/serial-tegra.c b/drivers/tty/serial/serial-tegra.c index dfe79cc..4455481 100644 --- a/drivers/tty/serial/serial-tegra.c +++ b/drivers/tty/serial/serial-tegra.c @@ -34,6 +34,7 @@ #include <linux/of_device.h> #include <linux/pagemap.h> #include <linux/platform_device.h> +#include <linux/reset.h> #include <linux/serial.h> #include <linux/serial_8250.h> #include <linux/serial_core.h> @@ -44,8 +45,6 @@ #include <linux/tty.h> #include <linux/tty_flip.h> -#include <linux/clk/tegra.h> - #define TEGRA_UART_TYPE "TEGRA_UART" #define TX_EMPTY_STATUS (UART_LSR_TEMT | UART_LSR_THRE) #define BYTES_TO_ALIGN(x) ((unsigned long)(x) & 0x3) @@ -103,6 +102,7 @@ struct tegra_uart_port { const struct tegra_uart_chip_data *cdata; struct clk *uart_clk; + struct reset_control *rst; unsigned int current_baud; /* Register shadow */ @@ -832,9 +832,9 @@ static int tegra_uart_hw_init(struct tegra_uart_port *tup) clk_prepare_enable(tup->uart_clk); /* Reset the UART controller to clear all previous status.*/ - tegra_periph_reset_assert(tup->uart_clk); + reset_control_assert(tup->rst); udelay(10); - tegra_periph_reset_deassert(tup->uart_clk); + reset_control_deassert(tup->rst); tup->rx_in_progress = 0; tup->tx_in_progress = 0; @@ -1320,6 +1320,12 @@ static int tegra_uart_probe(struct platform_device *pdev) return PTR_ERR(tup->uart_clk); } + tup->rst = devm_reset_control_get(&pdev->dev, "serial"); + if (IS_ERR(tup->rst)) { + dev_err(&pdev->dev, "Couldn't get the reset\n"); + return PTR_ERR(tup->rst); + } + u->iotype = UPIO_MEM32; u->irq = platform_get_irq(pdev, 0); u->regshift = 2; |
