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authorLaxman Dewangan <ldewangan@nvidia.com>2013-01-08 16:27:44 +0530
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2013-01-15 22:15:17 -0800
commite9ea096dd2259454e0d09d0b0445fe8f0117add4 (patch)
tree7feeb18200f00e0a9c7f6deba1aa04a801914d61 /drivers/tty/serial/Makefile
parent42d34191545be343909417dd05db799686f2e48e (diff)
downloadop-kernel-dev-e9ea096dd2259454e0d09d0b0445fe8f0117add4.zip
op-kernel-dev-e9ea096dd2259454e0d09d0b0445fe8f0117add4.tar.gz
serial: tegra: add serial driver
NVIDIA's Tegra has multiple UART controller which supports: - APB DMA based controller fifo read/write. - End Of Data interrupt in incoming data to know whether end of frame achieve or not. - HW controlled RTS and CTS flow control to reduce SW overhead. Add serial driver to use all above feature. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Acked-by: Alan Cox <alan@linux.intel.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/tty/serial/Makefile')
-rw-r--r--drivers/tty/serial/Makefile1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/tty/serial/Makefile b/drivers/tty/serial/Makefile
index df1b998..82e4306 100644
--- a/drivers/tty/serial/Makefile
+++ b/drivers/tty/serial/Makefile
@@ -80,6 +80,7 @@ obj-$(CONFIG_SERIAL_MXS_AUART) += mxs-auart.o
obj-$(CONFIG_SERIAL_LANTIQ) += lantiq.o
obj-$(CONFIG_SERIAL_XILINX_PS_UART) += xilinx_uartps.o
obj-$(CONFIG_SERIAL_SIRFSOC) += sirfsoc_uart.o
+obj-$(CONFIG_SERIAL_TEGRA) += serial-tegra.o
obj-$(CONFIG_SERIAL_AR933X) += ar933x_uart.o
obj-$(CONFIG_SERIAL_EFM32_UART) += efm32-uart.o
obj-$(CONFIG_SERIAL_ARC) += arc_uart.o
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