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author | Zhang Rui <rui.zhang@intel.com> | 2014-12-09 11:38:34 +0800 |
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committer | Zhang Rui <rui.zhang@intel.com> | 2014-12-09 11:38:34 +0800 |
commit | c89d99546dc5b076ccd6692c48ada9a92820a4ac (patch) | |
tree | 30788930f8c3fca80c0e5d8a377786d4a4a863bd /drivers/thermal/samsung/exynos_tmu.h | |
parent | 5a530ff0d88a366736ae4d1021e7358b52e55756 (diff) | |
parent | 9c1e4550b5cbe17ff68ce631356190ef9a565386 (diff) | |
download | op-kernel-dev-c89d99546dc5b076ccd6692c48ada9a92820a4ac.zip op-kernel-dev-c89d99546dc5b076ccd6692c48ada9a92820a4ac.tar.gz |
Merge branch 'eduardo-soc-thermal' into thermal-soc
Diffstat (limited to 'drivers/thermal/samsung/exynos_tmu.h')
-rw-r--r-- | drivers/thermal/samsung/exynos_tmu.h | 123 |
1 files changed, 9 insertions, 114 deletions
diff --git a/drivers/thermal/samsung/exynos_tmu.h b/drivers/thermal/samsung/exynos_tmu.h index c58c766..da3009b 100644 --- a/drivers/thermal/samsung/exynos_tmu.h +++ b/drivers/thermal/samsung/exynos_tmu.h @@ -40,115 +40,12 @@ enum soc_type { SOC_ARCH_EXYNOS4412, SOC_ARCH_EXYNOS5250, SOC_ARCH_EXYNOS5260, + SOC_ARCH_EXYNOS5420, SOC_ARCH_EXYNOS5420_TRIMINFO, SOC_ARCH_EXYNOS5440, }; /** - * EXYNOS TMU supported features. - * TMU_SUPPORT_EMULATION - This features is used to set user defined - * temperature to the TMU controller. - * TMU_SUPPORT_MULTI_INST - This features denotes that the soc - * has many instances of TMU. - * TMU_SUPPORT_TRIM_RELOAD - This features shows that trimming can - * be reloaded. - * TMU_SUPPORT_FALLING_TRIP - This features shows that interrupt can - * be registered for falling trips also. - * TMU_SUPPORT_READY_STATUS - This feature tells that the TMU current - * state(active/idle) can be checked. - * TMU_SUPPORT_EMUL_TIME - This features allows to set next temp emulation - * sample time. - * TMU_SUPPORT_ADDRESS_MULTIPLE - This feature tells that the different TMU - * sensors shares some common registers. - * TMU_SUPPORT - macro to compare the above features with the supplied. - */ -#define TMU_SUPPORT_EMULATION BIT(0) -#define TMU_SUPPORT_MULTI_INST BIT(1) -#define TMU_SUPPORT_TRIM_RELOAD BIT(2) -#define TMU_SUPPORT_FALLING_TRIP BIT(3) -#define TMU_SUPPORT_READY_STATUS BIT(4) -#define TMU_SUPPORT_EMUL_TIME BIT(5) -#define TMU_SUPPORT_ADDRESS_MULTIPLE BIT(6) - -#define TMU_SUPPORTS(a, b) (a->features & TMU_SUPPORT_ ## b) - -/** - * struct exynos_tmu_register - register descriptors to access registers and - * bitfields. The register validity, offsets and bitfield values may vary - * slightly across different exynos SOC's. - * @triminfo_data: register containing 2 pont trimming data - * @triminfo_ctrl: trim info controller register. - * @triminfo_ctrl_count: the number of trim info controller register. - * @tmu_ctrl: TMU main controller register. - * @test_mux_addr_shift: shift bits of test mux address. - * @therm_trip_mode_shift: shift bits of tripping mode in tmu_ctrl register. - * @therm_trip_mode_mask: mask bits of tripping mode in tmu_ctrl register. - * @therm_trip_en_shift: shift bits of tripping enable in tmu_ctrl register. - * @tmu_status: register drescribing the TMU status. - * @tmu_cur_temp: register containing the current temperature of the TMU. - * @threshold_temp: register containing the base threshold level. - * @threshold_th0: Register containing first set of rising levels. - * @threshold_th1: Register containing second set of rising levels. - * @threshold_th2: Register containing third set of rising levels. - * @threshold_th3_l0_shift: shift bits of level0 threshold temperature. - * @tmu_inten: register containing the different threshold interrupt - enable bits. - * @inten_rise0_shift: shift bits of rising 0 interrupt bits. - * @inten_rise1_shift: shift bits of rising 1 interrupt bits. - * @inten_rise2_shift: shift bits of rising 2 interrupt bits. - * @inten_rise3_shift: shift bits of rising 3 interrupt bits. - * @inten_fall0_shift: shift bits of falling 0 interrupt bits. - * @tmu_intstat: Register containing the interrupt status values. - * @tmu_intclear: Register for clearing the raised interrupt status. - * @emul_con: TMU emulation controller register. - * @emul_temp_shift: shift bits of emulation temperature. - * @emul_time_shift: shift bits of emulation time. - * @tmu_irqstatus: register to find which TMU generated interrupts. - * @tmu_pmin: register to get/set the Pmin value. - */ -struct exynos_tmu_registers { - u32 triminfo_data; - - u32 triminfo_ctrl[MAX_TRIMINFO_CTRL_REG]; - u32 triminfo_ctrl_count; - - u32 tmu_ctrl; - u32 test_mux_addr_shift; - u32 therm_trip_mode_shift; - u32 therm_trip_mode_mask; - u32 therm_trip_en_shift; - - u32 tmu_status; - - u32 tmu_cur_temp; - - u32 threshold_temp; - - u32 threshold_th0; - u32 threshold_th1; - u32 threshold_th2; - u32 threshold_th3_l0_shift; - - u32 tmu_inten; - u32 inten_rise0_shift; - u32 inten_rise1_shift; - u32 inten_rise2_shift; - u32 inten_rise3_shift; - u32 inten_fall0_shift; - - u32 tmu_intstat; - - u32 tmu_intclear; - - u32 emul_con; - u32 emul_temp_shift; - u32 emul_time_shift; - - u32 tmu_irqstatus; - u32 tmu_pmin; -}; - -/** * struct exynos_tmu_platform_data * @threshold: basic temperature for generating interrupt * 25 <= threshold <= 125 [unit: degree Celsius] @@ -192,16 +89,10 @@ struct exynos_tmu_registers { * @first_point_trim: temp value of the first point trimming * @second_point_trim: temp value of the second point trimming * @default_temp_offset: default temperature offset in case of no trimming - * @test_mux; information if SoC supports test MUX - * @triminfo_reload: reload value to read TRIMINFO register * @cal_type: calibration type for temperature * @freq_clip_table: Table representing frequency reduction percentage. * @freq_tab_count: Count of the above table as frequency reduction may * applicable to only some of the trigger levels. - * @registers: Pointer to structure containing all the TMU controller registers - * and bitfields shifts and masks. - * @features: a bitfield value indicating the features supported in SOC like - * emulation, multi instance etc * * This structure is required for configuration of exynos_tmu driver. */ @@ -223,15 +114,11 @@ struct exynos_tmu_platform_data { u8 first_point_trim; u8 second_point_trim; u8 default_temp_offset; - u8 test_mux; - u8 triminfo_reload[MAX_TRIMINFO_CTRL_REG]; enum calibration_type cal_type; enum soc_type type; struct freq_clip_table freq_tab[4]; unsigned int freq_tab_count; - const struct exynos_tmu_registers *registers; - unsigned int features; }; /** @@ -246,4 +133,12 @@ struct exynos_tmu_init_data { struct exynos_tmu_platform_data tmu_data[]; }; +extern struct exynos_tmu_init_data const exynos3250_default_tmu_data; +extern struct exynos_tmu_init_data const exynos4210_default_tmu_data; +extern struct exynos_tmu_init_data const exynos4412_default_tmu_data; +extern struct exynos_tmu_init_data const exynos5250_default_tmu_data; +extern struct exynos_tmu_init_data const exynos5260_default_tmu_data; +extern struct exynos_tmu_init_data const exynos5420_default_tmu_data; +extern struct exynos_tmu_init_data const exynos5440_default_tmu_data; + #endif /* _EXYNOS_TMU_H */ |