Merge branch 'poll' into staging/for_v3.4

* poll: (5970 commits)
  poll: add poll_requested_events() and poll_does_not_wait() functions
  crc32: select an algorithm via Kconfig
  crc32: add self-test code for crc32c
  crypto: crc32c should use library implementation
  crc32: bolt on crc32c
  crc32: add note about this patchset to crc32.c
  crc32: optimize loop counter for x86
  crc32: add slice-by-8 algorithm to existing code
  crc32: make CRC_*_BITS definition correspond to actual bit counts
  crc32: fix mixing of endian-specific types
  crc32: miscellaneous cleanups
  crc32: simplify unit test code
  crc32: move long comment about crc32 fundamentals to Documentation/
  crc32: remove two instances of trailing whitespaces
  checkpatch: check for quoted strings broken across lines
  checkpatch: whitespace - add/remove blank lines
  checkpatch: warn on use of yield()
  checkpatch: add --strict tests for braces, comments and casts
  checkpatch: add [] to type extensions
  checkpatch: high precedence operators do not require additional parentheses in #defines
  ...

1 files changed, 0 insertions, 22 deletions

diff --git a/drivers/staging/tidspbridge/Kconfig b/drivers/staging/tidspbridge/Kconfig
index 21a559e..0dd479f 100644
--- a/drivers/staging/tidspbridge/Kconfig
+++ b/drivers/staging/tidspbridge/Kconfig
@@ -31,12 +31,6 @@ config TIDSPBRIDGE_MEMPOOL_SIZE
 	  Allocate specified size of memory at booting time to avoid allocation
 	  failure under heavy memory fragmentation after some use time.
 
-config TIDSPBRIDGE_DEBUG
-	bool "Debug Support"
-	depends on TIDSPBRIDGE
-	help
-	  Say Y to enable Bridge debugging capabilities
-
 config TIDSPBRIDGE_RECOVERY
 	bool "Recovery Support"
 	depends on TIDSPBRIDGE
@@ -58,22 +52,6 @@ config TIDSPBRIDGE_CACHE_LINE_CHECK
 	  This can lead to heap corruption. Say Y, to enforce the check for 128
 	  byte alignment, buffers failing this check will be rejected.
 
-config TIDSPBRIDGE_WDT3
-	bool "Enable watchdog timer"
-	depends on TIDSPBRIDGE
-	help
-	  WTD3 is managed by DSP and once it is enabled, DSP side bridge is in
-	  charge of refreshing the timer before overflow, if the DSP hangs MPU
-	  will caught the interrupt and try to recover DSP.
-
-config TIDSPBRIDGE_WDT_TIMEOUT
-	int "Watchdog timer timeout (in secs)"
-	depends on TIDSPBRIDGE && TIDSPBRIDGE_WDT3
-	default 5
-	help
-	   Watchdog timer timeout value, after that time if the watchdog timer
-	   counter is not reset the wdt overflow interrupt will be triggered
-
 config TIDSPBRIDGE_NTFY_PWRERR
 	bool "Notify power errors"
 	depends on TIDSPBRIDGE