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author | Mike Rapoport <mike.rapoport@gmail.com> | 2016-02-10 18:34:08 +0200 |
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committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2016-02-11 19:52:37 -0800 |
commit | 6fba39cf32a3adc84de531bb8463d208f6d6f2bf (patch) | |
tree | c6d2e5db8441baa1d4557d0efc1b21d34c0b74b8 /drivers/staging/sm750fb/ddk750_display.c | |
parent | 5b621779c2365216dcbf6f9166c2e791e304767a (diff) | |
download | op-kernel-dev-6fba39cf32a3adc84de531bb8463d208f6d6f2bf.zip op-kernel-dev-6fba39cf32a3adc84de531bb8463d208f6d6f2bf.tar.gz |
staging: sm750fb: use BIT macro for PANEL_DISPLAY_CTRL single-bit fields
Replace complex definition of PANEL_DISPLAY_CTRL register fields with BIT()
macro and use open-coded implementation for register manipulations.
Signed-off-by: Mike Rapoport <mike.rapoport@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/staging/sm750fb/ddk750_display.c')
-rw-r--r-- | drivers/staging/sm750fb/ddk750_display.c | 24 |
1 files changed, 10 insertions, 14 deletions
diff --git a/drivers/staging/sm750fb/ddk750_display.c b/drivers/staging/sm750fb/ddk750_display.c index ae8bb37..f0e0444 100644 --- a/drivers/staging/sm750fb/ddk750_display.c +++ b/drivers/staging/sm750fb/ddk750_display.c @@ -28,10 +28,10 @@ static void setDisplayControl(int ctrl, int disp_state) * guarantee that the plane will also enabled or * disabled. */ - val = FIELD_SET(val, DISPLAY_CTRL, TIMING, ENABLE); + val |= DISPLAY_CTRL_TIMING; POKE32(reg, val); - val = FIELD_SET(val, DISPLAY_CTRL, PLANE, ENABLE); + val |= DISPLAY_CTRL_PLANE; /* * Somehow the register value on the plane is not set @@ -53,10 +53,10 @@ static void setDisplayControl(int ctrl, int disp_state) * find out if it is necessary to wait for 1 vsync * before modifying the timing enable bit. */ - val = FIELD_SET(val, DISPLAY_CTRL, PLANE, DISABLE); + val &= ~DISPLAY_CTRL_PLANE; POKE32(reg, val); - val = FIELD_SET(val, DISPLAY_CTRL, TIMING, DISABLE); + val &= ~DISPLAY_CTRL_TIMING; POKE32(reg, val); } } @@ -71,9 +71,7 @@ static void waitNextVerticalSync(int ctrl, int delay) /* Do not wait when the Primary PLL is off or display control is already off. This will prevent the software to wait forever. */ if (!(PEEK32(PANEL_PLL_CTRL) & PLL_CTRL_POWER) || - (FIELD_GET(PEEK32(PANEL_DISPLAY_CTRL), - DISPLAY_CTRL, TIMING) == - DISPLAY_CTRL_TIMING_DISABLE)) { + !(PEEK32(PANEL_DISPLAY_CTRL) & DISPLAY_CTRL_TIMING)) { return; } @@ -94,9 +92,7 @@ static void waitNextVerticalSync(int ctrl, int delay) /* Do not wait when the Primary PLL is off or display control is already off. This will prevent the software to wait forever. */ if (!(PEEK32(CRT_PLL_CTRL) & PLL_CTRL_POWER) || - (FIELD_GET(PEEK32(CRT_DISPLAY_CTRL), - DISPLAY_CTRL, TIMING) == - DISPLAY_CTRL_TIMING_DISABLE)) { + !(PEEK32(CRT_DISPLAY_CTRL) & DISPLAY_CTRL_TIMING)) { return; } @@ -120,22 +116,22 @@ static void swPanelPowerSequence(int disp, int delay) /* disp should be 1 to open sequence */ reg = PEEK32(PANEL_DISPLAY_CTRL); - reg = FIELD_VALUE(reg, PANEL_DISPLAY_CTRL, FPEN, disp); + reg |= (disp ? PANEL_DISPLAY_CTRL_FPEN : 0); POKE32(PANEL_DISPLAY_CTRL, reg); primaryWaitVerticalSync(delay); reg = PEEK32(PANEL_DISPLAY_CTRL); - reg = FIELD_VALUE(reg, PANEL_DISPLAY_CTRL, DATA, disp); + reg |= (disp ? PANEL_DISPLAY_CTRL_DATA : 0); POKE32(PANEL_DISPLAY_CTRL, reg); primaryWaitVerticalSync(delay); reg = PEEK32(PANEL_DISPLAY_CTRL); - reg = FIELD_VALUE(reg, PANEL_DISPLAY_CTRL, VBIASEN, disp); + reg |= (disp ? PANEL_DISPLAY_CTRL_VBIASEN : 0); POKE32(PANEL_DISPLAY_CTRL, reg); primaryWaitVerticalSync(delay); reg = PEEK32(PANEL_DISPLAY_CTRL); - reg = FIELD_VALUE(reg, PANEL_DISPLAY_CTRL, FPEN, disp); + reg |= (disp ? PANEL_DISPLAY_CTRL_FPEN : 0); POKE32(PANEL_DISPLAY_CTRL, reg); primaryWaitVerticalSync(delay); |