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authorLarry Finger <Larry.Finger@lwfinger.net>2011-08-25 11:48:11 -0500
committerGreg Kroah-Hartman <gregkh@suse.de>2011-08-25 10:05:08 -0700
commitac513a88a072b23452ca96a86f18ba8b9c0d85cd (patch)
treefdf0cd2b381d79cca121a2ec8c4ad55ae10016b4 /drivers/staging/rtl8192e/r8190P_rtl8256.c
parent75bf74b90fd0c21b92d5e6153eb40388812e7096 (diff)
downloadop-kernel-dev-ac513a88a072b23452ca96a86f18ba8b9c0d85cd.zip
op-kernel-dev-ac513a88a072b23452ca96a86f18ba8b9c0d85cd.tar.gz
staging: rtl8192e: Cleanup checkpatch -f warnings and errors - Part I
Signed-off-by: Larry Finger <Larry.Finger@lwfinger.net> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Diffstat (limited to 'drivers/staging/rtl8192e/r8190P_rtl8256.c')
-rw-r--r--drivers/staging/rtl8192e/r8190P_rtl8256.c186
1 files changed, 120 insertions, 66 deletions
diff --git a/drivers/staging/rtl8192e/r8190P_rtl8256.c b/drivers/staging/rtl8192e/r8190P_rtl8256.c
index e8bef59..0da56c8 100644
--- a/drivers/staging/rtl8192e/r8190P_rtl8256.c
+++ b/drivers/staging/rtl8192e/r8190P_rtl8256.c
@@ -22,41 +22,59 @@
#include "r8192E_phy.h"
#include "r8190P_rtl8256.h"
-void PHY_SetRF8256Bandwidth(struct net_device* dev , enum ht_channel_width Bandwidth)
+void PHY_SetRF8256Bandwidth(struct net_device *dev,
+ enum ht_channel_width Bandwidth)
{
u8 eRFPath;
struct r8192_priv *priv = rtllib_priv(dev);
- for (eRFPath = 0; eRFPath <priv->NumTotalRFPath; eRFPath++) {
+ for (eRFPath = 0; eRFPath < priv->NumTotalRFPath; eRFPath++) {
if (!rtl8192_phy_CheckIsLegalRFPath(dev, eRFPath))
continue;
switch (Bandwidth) {
case HT_CHANNEL_WIDTH_20:
- if (priv->card_8192_version == VERSION_8190_BD || priv->card_8192_version == VERSION_8190_BE) {
- rtl8192_phy_SetRFReg(dev, (enum rf90_radio_path)eRFPath, 0x0b, bMask12Bits, 0x100);
- rtl8192_phy_SetRFReg(dev, (enum rf90_radio_path)eRFPath, 0x2c, bMask12Bits, 0x3d7);
- rtl8192_phy_SetRFReg(dev, (enum rf90_radio_path)eRFPath, 0x0e, bMask12Bits, 0x021);
+ if (priv->card_8192_version == VERSION_8190_BD ||
+ priv->card_8192_version == VERSION_8190_BE) {
+ rtl8192_phy_SetRFReg(dev,
+ (enum rf90_radio_path)eRFPath,
+ 0x0b, bMask12Bits, 0x100);
+ rtl8192_phy_SetRFReg(dev,
+ (enum rf90_radio_path)eRFPath,
+ 0x2c, bMask12Bits, 0x3d7);
+ rtl8192_phy_SetRFReg(dev,
+ (enum rf90_radio_path)eRFPath,
+ 0x0e, bMask12Bits, 0x021);
} else {
- RT_TRACE(COMP_ERR, "PHY_SetRF8256Bandwidth(): unknown hardware version\n");
+ RT_TRACE(COMP_ERR, "PHY_SetRF8256Bandwidth(): "
+ "unknown hardware version\n");
}
break;
case HT_CHANNEL_WIDTH_20_40:
- if (priv->card_8192_version == VERSION_8190_BD ||priv->card_8192_version == VERSION_8190_BE) {
- rtl8192_phy_SetRFReg(dev, (enum rf90_radio_path)eRFPath, 0x0b, bMask12Bits, 0x300);
- rtl8192_phy_SetRFReg(dev, (enum rf90_radio_path)eRFPath, 0x2c, bMask12Bits, 0x3ff);
- rtl8192_phy_SetRFReg(dev, (enum rf90_radio_path)eRFPath, 0x0e, bMask12Bits, 0x0e1);
+ if (priv->card_8192_version == VERSION_8190_BD ||
+ priv->card_8192_version == VERSION_8190_BE) {
+ rtl8192_phy_SetRFReg(dev,
+ (enum rf90_radio_path)eRFPath,
+ 0x0b, bMask12Bits, 0x300);
+ rtl8192_phy_SetRFReg(dev,
+ (enum rf90_radio_path)eRFPath,
+ 0x2c, bMask12Bits, 0x3ff);
+ rtl8192_phy_SetRFReg(dev,
+ (enum rf90_radio_path)eRFPath,
+ 0x0e, bMask12Bits, 0x0e1);
} else {
- RT_TRACE(COMP_ERR, "PHY_SetRF8256Bandwidth(): unknown hardware version\n");
+ RT_TRACE(COMP_ERR, "PHY_SetRF8256Bandwidth(): "
+ "unknown hardware version\n");
}
break;
default:
- RT_TRACE(COMP_ERR, "PHY_SetRF8256Bandwidth(): unknown Bandwidth: %#X\n",Bandwidth );
+ RT_TRACE(COMP_ERR, "PHY_SetRF8256Bandwidth(): unknown "
+ "Bandwidth: %#X\n", Bandwidth);
break;
}
@@ -64,7 +82,7 @@ void PHY_SetRF8256Bandwidth(struct net_device* dev , enum ht_channel_width Bandw
return;
}
-bool PHY_RF8256_Config(struct net_device* dev)
+bool PHY_RF8256_Config(struct net_device *dev)
{
struct r8192_priv *priv = rtllib_priv(dev);
bool rtStatus = true;
@@ -74,7 +92,7 @@ bool PHY_RF8256_Config(struct net_device* dev)
return rtStatus;
}
-bool phy_RF8256_Config_ParaFile(struct net_device* dev)
+bool phy_RF8256_Config_ParaFile(struct net_device *dev)
{
u32 u4RegValue = 0;
u8 eRFPath;
@@ -87,7 +105,8 @@ bool phy_RF8256_Config_ParaFile(struct net_device* dev)
u8 ConstRetryTimes = 5, RetryTimes = 5;
u8 ret = 0;
- for (eRFPath = (enum rf90_radio_path)RF90_PATH_A; eRFPath <priv->NumTotalRFPath; eRFPath++) {
+ for (eRFPath = (enum rf90_radio_path)RF90_PATH_A;
+ eRFPath < priv->NumTotalRFPath; eRFPath++) {
if (!rtl8192_phy_CheckIsLegalRFPath(dev, eRFPath))
continue;
@@ -97,11 +116,13 @@ bool phy_RF8256_Config_ParaFile(struct net_device* dev)
switch (eRFPath) {
case RF90_PATH_A:
case RF90_PATH_C:
- u4RegValue = rtl8192_QueryBBReg(dev, pPhyReg->rfintfs, bRFSI_RFENV);
+ u4RegValue = rtl8192_QueryBBReg(dev, pPhyReg->rfintfs,
+ bRFSI_RFENV);
break;
- case RF90_PATH_B :
+ case RF90_PATH_B:
case RF90_PATH_D:
- u4RegValue = rtl8192_QueryBBReg(dev, pPhyReg->rfintfs, bRFSI_RFENV<<16);
+ u4RegValue = rtl8192_QueryBBReg(dev, pPhyReg->rfintfs,
+ bRFSI_RFENV<<16);
break;
}
@@ -109,14 +130,19 @@ bool phy_RF8256_Config_ParaFile(struct net_device* dev)
rtl8192_setBBreg(dev, pPhyReg->rfintfo, bRFSI_RFENV, 0x1);
- rtl8192_setBBreg(dev, pPhyReg->rfHSSIPara2, b3WireAddressLength, 0x0);
- rtl8192_setBBreg(dev, pPhyReg->rfHSSIPara2, b3WireDataLength, 0x0);
+ rtl8192_setBBreg(dev, pPhyReg->rfHSSIPara2,
+ b3WireAddressLength, 0x0);
+ rtl8192_setBBreg(dev, pPhyReg->rfHSSIPara2,
+ b3WireDataLength, 0x0);
- rtl8192_phy_SetRFReg(dev, (enum rf90_radio_path) eRFPath, 0x0, bMask12Bits, 0xbf);
+ rtl8192_phy_SetRFReg(dev, (enum rf90_radio_path) eRFPath, 0x0,
+ bMask12Bits, 0xbf);
- rtStatus = rtl8192_phy_checkBBAndRF(dev, HW90_BLOCK_RF, (enum rf90_radio_path)eRFPath);
- if (rtStatus!= true) {
- RT_TRACE(COMP_ERR, "PHY_RF8256_Config():Check Radio[%d] Fail!!\n", eRFPath);
+ rtStatus = rtl8192_phy_checkBBAndRF(dev, HW90_BLOCK_RF,
+ (enum rf90_radio_path)eRFPath);
+ if (rtStatus != true) {
+ RT_TRACE(COMP_ERR, "PHY_RF8256_Config():Check "
+ "Radio[%d] Fail!!\n", eRFPath);
goto phy_RF8256_Config_ParaFile_Fail;
}
@@ -124,34 +150,61 @@ bool phy_RF8256_Config_ParaFile(struct net_device* dev)
RF3_Final_Value = 0;
switch (eRFPath) {
case RF90_PATH_A:
- while (RF3_Final_Value!=RegValueToBeCheck && RetryTimes != 0) {
- ret = rtl8192_phy_ConfigRFWithHeaderFile(dev,(enum rf90_radio_path)eRFPath);
- RF3_Final_Value = rtl8192_phy_QueryRFReg(dev, (enum rf90_radio_path)eRFPath, RegOffSetToBeCheck, bMask12Bits);
- RT_TRACE(COMP_RF, "RF %d %d register final value: %x\n", eRFPath, RegOffSetToBeCheck, RF3_Final_Value);
+ while (RF3_Final_Value != RegValueToBeCheck &&
+ RetryTimes != 0) {
+ ret = rtl8192_phy_ConfigRFWithHeaderFile(dev,
+ (enum rf90_radio_path)eRFPath);
+ RF3_Final_Value = rtl8192_phy_QueryRFReg(dev,
+ (enum rf90_radio_path)eRFPath,
+ RegOffSetToBeCheck,
+ bMask12Bits);
+ RT_TRACE(COMP_RF, "RF %d %d register final "
+ "value: %x\n", eRFPath,
+ RegOffSetToBeCheck, RF3_Final_Value);
RetryTimes--;
}
break;
case RF90_PATH_B:
- while (RF3_Final_Value!=RegValueToBeCheck && RetryTimes != 0) {
- ret = rtl8192_phy_ConfigRFWithHeaderFile(dev,(enum rf90_radio_path)eRFPath);
- RF3_Final_Value = rtl8192_phy_QueryRFReg(dev, (enum rf90_radio_path)eRFPath, RegOffSetToBeCheck, bMask12Bits);
- RT_TRACE(COMP_RF, "RF %d %d register final value: %x\n", eRFPath, RegOffSetToBeCheck, RF3_Final_Value);
+ while (RF3_Final_Value != RegValueToBeCheck &&
+ RetryTimes != 0) {
+ ret = rtl8192_phy_ConfigRFWithHeaderFile(dev,
+ (enum rf90_radio_path)eRFPath);
+ RF3_Final_Value = rtl8192_phy_QueryRFReg(dev,
+ (enum rf90_radio_path)eRFPath,
+ RegOffSetToBeCheck,
+ bMask12Bits);
+ RT_TRACE(COMP_RF, "RF %d %d register final "
+ "value: %x\n", eRFPath,
+ RegOffSetToBeCheck, RF3_Final_Value);
RetryTimes--;
}
break;
case RF90_PATH_C:
- while (RF3_Final_Value!=RegValueToBeCheck && RetryTimes != 0) {
- ret = rtl8192_phy_ConfigRFWithHeaderFile(dev,(enum rf90_radio_path)eRFPath);
- RF3_Final_Value = rtl8192_phy_QueryRFReg(dev, (enum rf90_radio_path)eRFPath, RegOffSetToBeCheck, bMask12Bits);
- RT_TRACE(COMP_RF, "RF %d %d register final value: %x\n", eRFPath, RegOffSetToBeCheck, RF3_Final_Value);
+ while (RF3_Final_Value != RegValueToBeCheck &&
+ RetryTimes != 0) {
+ ret = rtl8192_phy_ConfigRFWithHeaderFile(dev,
+ (enum rf90_radio_path)eRFPath);
+ RF3_Final_Value = rtl8192_phy_QueryRFReg(dev,
+ (enum rf90_radio_path)eRFPath,
+ RegOffSetToBeCheck,
+ bMask12Bits);
+ RT_TRACE(COMP_RF, "RF %d %d register final "
+ "value: %x\n", eRFPath,
+ RegOffSetToBeCheck, RF3_Final_Value);
RetryTimes--;
}
break;
case RF90_PATH_D:
- while (RF3_Final_Value!=RegValueToBeCheck && RetryTimes != 0) {
- ret = rtl8192_phy_ConfigRFWithHeaderFile(dev,(enum rf90_radio_path)eRFPath);
- RF3_Final_Value = rtl8192_phy_QueryRFReg(dev, (enum rf90_radio_path)eRFPath, RegOffSetToBeCheck, bMask12Bits);
- RT_TRACE(COMP_RF, "RF %d %d register final value: %x\n", eRFPath, RegOffSetToBeCheck, RF3_Final_Value);
+ while (RF3_Final_Value != RegValueToBeCheck &&
+ RetryTimes != 0) {
+ ret = rtl8192_phy_ConfigRFWithHeaderFile(dev,
+ (enum rf90_radio_path)eRFPath);
+ RF3_Final_Value = rtl8192_phy_QueryRFReg(dev,
+ (enum rf90_radio_path)eRFPath,
+ RegOffSetToBeCheck, bMask12Bits);
+ RT_TRACE(COMP_RF, "RF %d %d register final "
+ "value: %x\n", eRFPath,
+ RegOffSetToBeCheck, RF3_Final_Value);
RetryTimes--;
}
break;
@@ -160,16 +213,19 @@ bool phy_RF8256_Config_ParaFile(struct net_device* dev)
switch (eRFPath) {
case RF90_PATH_A:
case RF90_PATH_C:
- rtl8192_setBBreg(dev, pPhyReg->rfintfs, bRFSI_RFENV, u4RegValue);
+ rtl8192_setBBreg(dev, pPhyReg->rfintfs, bRFSI_RFENV,
+ u4RegValue);
break;
- case RF90_PATH_B :
+ case RF90_PATH_B:
case RF90_PATH_D:
- rtl8192_setBBreg(dev, pPhyReg->rfintfs, bRFSI_RFENV<<16, u4RegValue);
+ rtl8192_setBBreg(dev, pPhyReg->rfintfs, bRFSI_RFENV<<16,
+ u4RegValue);
break;
}
if (ret) {
- RT_TRACE(COMP_ERR, "phy_RF8256_Config_ParaFile():Radio[%d] Fail!!", eRFPath);
+ RT_TRACE(COMP_ERR, "phy_RF8256_Config_ParaFile():"
+ "Radio[%d] Fail!!", eRFPath);
goto phy_RF8256_Config_ParaFile_Fail;
}
@@ -183,18 +239,17 @@ phy_RF8256_Config_ParaFile_Fail:
return false;
}
-void PHY_SetRF8256CCKTxPower(struct net_device* dev, u8 powerlevel)
+void PHY_SetRF8256CCKTxPower(struct net_device *dev, u8 powerlevel)
{
- u32 TxAGC=0;
+ u32 TxAGC = 0;
struct r8192_priv *priv = rtllib_priv(dev);
TxAGC = powerlevel;
- if (priv->bDynamicTxLowPower == true)
- {
+ if (priv->bDynamicTxLowPower == true) {
if (priv->CustomerID == RT_CID_819x_Netcore)
- TxAGC = 0x22;
- else
- TxAGC += priv->CckPwEnl;
+ TxAGC = 0x22;
+ else
+ TxAGC += priv->CckPwEnl;
}
if (TxAGC > 0x24)
TxAGC = 0x24;
@@ -202,7 +257,7 @@ void PHY_SetRF8256CCKTxPower(struct net_device* dev, u8 powerlevel)
}
-void PHY_SetRF8256OFDMTxPower(struct net_device* dev, u8 powerlevel)
+void PHY_SetRF8256OFDMTxPower(struct net_device *dev, u8 powerlevel)
{
struct r8192_priv *priv = rtllib_priv(dev);
u32 writeVal, powerBase0, powerBase1, writeVal_tmp;
@@ -211,13 +266,15 @@ void PHY_SetRF8256OFDMTxPower(struct net_device* dev, u8 powerlevel)
u8 byte0, byte1, byte2, byte3;
powerBase0 = powerlevel + priv->LegacyHTTxPowerDiff;
- powerBase0 = (powerBase0<<24) | (powerBase0<<16) |(powerBase0<<8) |powerBase0;
+ powerBase0 = (powerBase0 << 24) | (powerBase0 << 16) |
+ (powerBase0 << 8) | powerBase0;
powerBase1 = powerlevel;
- powerBase1 = (powerBase1<<24) | (powerBase1<<16) |(powerBase1<<8) |powerBase1;
+ powerBase1 = (powerBase1 << 24) | (powerBase1 << 16) |
+ (powerBase1 << 8) | powerBase1;
- for (index=0; index<6; index++)
- {
- writeVal = (u32)(priv->MCSTxPowerLevelOriginalOffset[index] + ((index<2)?powerBase0:powerBase1));
+ for (index = 0; index < 6; index++) {
+ writeVal = (u32)(priv->MCSTxPowerLevelOriginalOffset[index] +
+ ((index < 2) ? powerBase0 : powerBase1));
byte0 = (u8)(writeVal & 0x7f);
byte1 = (u8)((writeVal & 0x7f00)>>8);
byte2 = (u8)((writeVal & 0x7f0000)>>16);
@@ -231,20 +288,17 @@ void PHY_SetRF8256OFDMTxPower(struct net_device* dev, u8 powerlevel)
if (byte3 > 0x24)
byte3 = 0x24;
- if (index == 3)
- {
- writeVal_tmp = (byte3<<24) | (byte2<<16) |(byte1<<8) |byte0;
+ if (index == 3) {
+ writeVal_tmp = (byte3 << 24) | (byte2 << 16) |
+ (byte1 << 8) | byte0;
priv->Pwr_Track = writeVal_tmp;
}
if (priv->bDynamicTxHighPower == true)
- {
writeVal = 0x03030303;
- }
else
- {
- writeVal = (byte3<<24) | (byte2<<16) |(byte1<<8) |byte0;
- }
+ writeVal = (byte3 << 24) | (byte2 << 16) |
+ (byte1 << 8) | byte0;
rtl8192_setBBreg(dev, RegOffset[index], 0x7f7f7f7f, writeVal);
}
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