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| author | Vaibhav Hiremath <vaibhav.hiremath@linaro.org> | 2016-01-14 02:06:47 +0530 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@google.com> | 2016-01-13 15:54:55 -0800 |
| commit | aa187d33129ba102756600aa27f6e7992a6c814a (patch) | |
| tree | ad98cf7816c2907b740d79a68458b43759b9fab0 /drivers/staging/greybus/arche-apb-ctrl.c | |
| parent | 3a8dba4e57d11965fa8f649753dc1507dd8331eb (diff) | |
| download | op-kernel-dev-aa187d33129ba102756600aa27f6e7992a6c814a.zip op-kernel-dev-aa187d33129ba102756600aa27f6e7992a6c814a.tar.gz | |
greybus: arche-apb-ctrl: Enable the clocks after regulator enable
It makes more sense to enable the clock after power is enabled
to the device, so move clock enable code after regulator_enable
and setting up BOOT_RET pin.
Signed-off-by: Vaibhav Hiremath <vaibhav.hiremath@linaro.org>
Tested-by: Michael Scott <michael.scott@linaro.org>
Reviewed-by: Laurent Pinchart <laurent.pinchart@linaro.org>
Tested-by: Laurent Pinchart <laurent.pinchart@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@google.com>
Diffstat (limited to 'drivers/staging/greybus/arche-apb-ctrl.c')
| -rw-r--r-- | drivers/staging/greybus/arche-apb-ctrl.c | 31 |
1 files changed, 17 insertions, 14 deletions
diff --git a/drivers/staging/greybus/arche-apb-ctrl.c b/drivers/staging/greybus/arche-apb-ctrl.c index 65b1e9a..d073543 100644 --- a/drivers/staging/greybus/arche-apb-ctrl.c +++ b/drivers/staging/greybus/arche-apb-ctrl.c @@ -82,19 +82,6 @@ static int apb_ctrl_init_seq(struct platform_device *pdev, struct device *dev = &pdev->dev; int ret; - /* On DB3 clock was not mandatory */ - if (gpio_is_valid(apb->clk_en_gpio)) { - ret = devm_gpio_request(dev, apb->clk_en_gpio, "apb_clk_en"); - if (ret) { - dev_warn(dev, "Failed requesting APB clock en gpio %d\n", - apb->clk_en_gpio); - } else { - ret = gpio_direction_output(apb->clk_en_gpio, 1); - if (ret) - dev_warn(dev, "failed to set APB clock en gpio dir:%d\n", - ret); - } - } /* Hold APB in reset state */ ret = devm_gpio_request(dev, apb->resetn_gpio, "apb-reset"); if (ret) { @@ -128,6 +115,7 @@ static int apb_ctrl_init_seq(struct platform_device *pdev, return ret; } } + if (!IS_ERR(apb->vio)) { ret = regulator_enable(apb->vio); if (ret) { @@ -144,7 +132,22 @@ static int apb_ctrl_init_seq(struct platform_device *pdev, goto out_vio_disable; } gpio_set_value(apb->boot_ret_gpio, 0); - udelay(50); + + /* On DB3 clock was not mandatory */ + if (gpio_is_valid(apb->clk_en_gpio)) { + ret = devm_gpio_request(dev, apb->clk_en_gpio, "apb_clk_en"); + if (ret) { + dev_warn(dev, "Failed requesting APB clock en gpio %d\n", + apb->clk_en_gpio); + } else { + ret = gpio_direction_output(apb->clk_en_gpio, 1); + if (ret) + dev_warn(dev, "failed to set APB clock en gpio dir:%d\n", + ret); + } + } + + usleep_range(100, 200); return 0; |
