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authorAlan Cox <alan@linux.intel.com>2011-06-16 17:07:27 +0100
committerGreg Kroah-Hartman <gregkh@suse.de>2011-06-28 14:17:12 -0700
commitef41e3f4a5582328aca5ada27a118055b09e3d93 (patch)
treeef345201d5c676dc758cbf108e744e748b95df47 /drivers/staging/gma500/psb_intel_display.c
parentfb7ff7f66eeb137ec8d78e386c62638b95659dc6 (diff)
downloadop-kernel-dev-ef41e3f4a5582328aca5ada27a118055b09e3d93.zip
op-kernel-dev-ef41e3f4a5582328aca5ada27a118055b09e3d93.tar.gz
gma500: Set the correct bits according to the pipe
Squash a hardcoded assumption we shouldn't really make Signed-off-by: Alan Cox <alan@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Diffstat (limited to 'drivers/staging/gma500/psb_intel_display.c')
-rw-r--r--drivers/staging/gma500/psb_intel_display.c11
1 files changed, 6 insertions, 5 deletions
diff --git a/drivers/staging/gma500/psb_intel_display.c b/drivers/staging/gma500/psb_intel_display.c
index 4f47d09..a99271d 100644
--- a/drivers/staging/gma500/psb_intel_display.c
+++ b/drivers/staging/gma500/psb_intel_display.c
@@ -723,17 +723,18 @@ static int psb_intel_crtc_mode_set(struct drm_crtc *crtc,
if (is_lvds) {
u32 lvds = REG_READ(LVDS);
- lvds |=
- LVDS_PORT_EN | LVDS_A0A2_CLKA_POWER_UP |
- LVDS_PIPEB_SELECT;
+ lvds &= ~LVDS_PIPEB_SELECT;
+ if (pipe == 1)
+ lvds |= LVDS_PIPEB_SELECT;
+
+ lvds |= LVDS_PORT_EN | LVDS_A0A2_CLKA_POWER_UP;
/* Set the B0-B3 data pairs corresponding to
* whether we're going to
* set the DPLLs for dual-channel mode or not.
*/
+ lvds &= ~(LVDS_B0B3_POWER_UP | LVDS_CLKB_POWER_UP);
if (clock.p2 == 7)
lvds |= LVDS_B0B3_POWER_UP | LVDS_CLKB_POWER_UP;
- else
- lvds &= ~(LVDS_B0B3_POWER_UP | LVDS_CLKB_POWER_UP);
/* It would be nice to set 24 vs 18-bit mode (LVDS_A3_POWER_UP)
* appropriately here, but we need to look more
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