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authorAlan Cox <alan@linux.intel.com>2011-07-05 15:36:19 +0100
committerGreg Kroah-Hartman <gregkh@suse.de>2011-07-05 08:20:39 -0700
commite2e88603c85218cdb7de75d94cc6521c3a180838 (patch)
treeea5994806a0732417ab8321597323269a837206a /drivers/staging/gma500/mrst.h
parent2cf10d23dff547d6018673a30e86490a768b3280 (diff)
downloadop-kernel-dev-e2e88603c85218cdb7de75d94cc6521c3a180838.zip
op-kernel-dev-e2e88603c85218cdb7de75d94cc6521c3a180838.tar.gz
gma500: CodingStyle pass
Start the style cleanup Signed-off-by: Alan Cox <alan@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Diffstat (limited to 'drivers/staging/gma500/mrst.h')
-rw-r--r--drivers/staging/gma500/mrst.h38
1 files changed, 19 insertions, 19 deletions
diff --git a/drivers/staging/gma500/mrst.h b/drivers/staging/gma500/mrst.h
index 5e4aaeb..7bacb9a 100644
--- a/drivers/staging/gma500/mrst.h
+++ b/drivers/staging/gma500/mrst.h
@@ -25,7 +25,7 @@ struct mrst_vbt {
u8 size;
u8 checksum;
void *mrst_gct;
-} __attribute__ ((packed));
+} __packed;
struct mrst_timing_info {
u16 pixel_clock;
@@ -58,7 +58,7 @@ struct mrst_timing_info {
u8 stereo:1;
u8 unknown6:1;
u8 interlaced:1;
-} __attribute__((packed));
+} __packed;
struct gct_r10_timing_info {
u16 pixel_clock;
@@ -82,7 +82,7 @@ struct gct_r10_timing_info {
u16 vsync_pulse_width_hi:2;
u16 vsync_positive:1;
u16 rsvd_2:3;
-} __attribute__((packed));
+} __packed;
struct mrst_panel_descriptor_v1 {
u32 Panel_Port_Control; /* 1 dword, Register 0x61180 if LVDS */
@@ -111,7 +111,7 @@ struct mrst_panel_descriptor_v1 {
/* Bit 6, Reserved, 2 bits, 00b */
/* Bit 8, Minimum Supported Frame Rate, 6 bits, 0 - 63Hz */
/* Bit 14, Reserved, 2 bits, 00b */
-} __attribute__ ((packed));
+} __packed;
struct mrst_panel_descriptor_v2 {
u32 Panel_Port_Control; /* 1 dword, Register 0x61180 if LVDS */
@@ -141,10 +141,10 @@ struct mrst_panel_descriptor_v2 {
/* Bit 6, Reserved, 2 bits, 00b */
/* Bit 8, Minimum Supported Frame Rate, 6 bits, 0 - 63Hz */
/* Bit 14, Reserved, 2 bits, 00b */
-} __attribute__ ((packed));
+} __packed;
union mrst_panel_rx {
- struct{
+ struct {
u16 NumberOfLanes:2; /*Num of Lanes, 2 bits,0 = 1 lane,*/
/* 1 = 2 lanes, 2 = 3 lanes, 3 = 4 lanes. */
u16 MaxLaneFreq:3; /* 0: 100MHz, 1: 200MHz, 2: 300MHz, */
@@ -159,10 +159,10 @@ union mrst_panel_rx {
u16 Rsvd:5;/*5 bits,00000b */
} panelrx;
u16 panel_receiver;
-} __attribute__ ((packed));
+} __packed;
struct mrst_gct_v1 {
- union{ /*8 bits,Defined as follows: */
+ union { /*8 bits,Defined as follows: */
struct {
u8 PanelType:4; /*4 bits, Bit field for panels*/
/* 0 - 3: 0 = LVDS, 1 = MIPI*/
@@ -176,10 +176,10 @@ struct mrst_gct_v1 {
};
struct mrst_panel_descriptor_v1 panel[4];/*panel descrs,38 bytes each*/
union mrst_panel_rx panelrx[4]; /* panel receivers*/
-} __attribute__ ((packed));
+} __packed;
struct mrst_gct_v2 {
- union{ /*8 bits,Defined as follows: */
+ union { /*8 bits,Defined as follows: */
struct {
u8 PanelType:4; /*4 bits, Bit field for panels*/
/* 0 - 3: 0 = LVDS, 1 = MIPI*/
@@ -193,7 +193,7 @@ struct mrst_gct_v2 {
};
struct mrst_panel_descriptor_v2 panel[4];/*panel descrs,38 bytes each*/
union mrst_panel_rx panelrx[4]; /* panel receivers*/
-} __attribute__ ((packed));
+} __packed;
struct mrst_gct_data {
u8 bpi; /* boot panel index, number of panel used during boot */
@@ -205,13 +205,13 @@ struct mrst_gct_data {
u32 PP_Cycle_Delay;
u16 Panel_Backlight_Inverter_Descriptor;
u16 Panel_MIPI_Display_Descriptor;
-} __attribute__ ((packed));
+} __packed;
-#define MODE_SETTING_IN_CRTC 0x1
-#define MODE_SETTING_IN_ENCODER 0x2
-#define MODE_SETTING_ON_GOING 0x3
-#define MODE_SETTING_IN_DSR 0x4
-#define MODE_SETTING_ENCODER_DONE 0x8
-#define GCT_R10_HEADER_SIZE 16
-#define GCT_R10_DISPLAY_DESC_SIZE 28
+#define MODE_SETTING_IN_CRTC 0x1
+#define MODE_SETTING_IN_ENCODER 0x2
+#define MODE_SETTING_ON_GOING 0x3
+#define MODE_SETTING_IN_DSR 0x4
+#define MODE_SETTING_ENCODER_DONE 0x8
+#define GCT_R10_HEADER_SIZE 16
+#define GCT_R10_DISPLAY_DESC_SIZE 28
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