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| author | Alan Cox <alan@linux.intel.com> | 2009-08-27 11:01:13 +0100 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@suse.de> | 2009-09-15 12:02:28 -0700 |
| commit | df482a0916a0ad7473687745e363475e8ce9cd5a (patch) | |
| tree | 687002ed1cfe53bd878d0e2b077a4d09ba309109 /drivers/staging/et131x/et1310_address_map.h | |
| parent | 13071fded6df0979d50307a463be819377fc2822 (diff) | |
| download | op-kernel-dev-df482a0916a0ad7473687745e363475e8ce9cd5a.zip op-kernel-dev-df482a0916a0ad7473687745e363475e8ce9cd5a.tar.gz | |
Staging: et131x: sort out the mmc enable routine
Signed-off-by: Alan Cox <alan@linux.intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Diffstat (limited to 'drivers/staging/et131x/et1310_address_map.h')
| -rw-r--r-- | drivers/staging/et131x/et1310_address_map.h | 34 |
1 files changed, 9 insertions, 25 deletions
diff --git a/drivers/staging/et131x/et1310_address_map.h b/drivers/staging/et131x/et1310_address_map.h index 388ac40..3f87d3f 100644 --- a/drivers/staging/et131x/et1310_address_map.h +++ b/drivers/staging/et131x/et1310_address_map.h @@ -2267,30 +2267,14 @@ typedef struct _MAC_STAT_t { /* Location: */ * structure for Main Memory Controller Control reg in mmc address map. * located at address 0x7000 */ -typedef union _MMC_CTRL_t { - u32 value; - struct { -#ifdef _BIT_FIELDS_HTOL - u32 reserved:25; /* bits 7-31 */ - u32 force_ce:1; /* bit 6 */ - u32 rxdma_disable:1; /* bit 5 */ - u32 txdma_disable:1; /* bit 4 */ - u32 txmac_disable:1; /* bit 3 */ - u32 rxmac_disable:1; /* bit 2 */ - u32 arb_disable:1; /* bit 1 */ - u32 mmc_enable:1; /* bit 0 */ -#else - u32 mmc_enable:1; /* bit 0 */ - u32 arb_disable:1; /* bit 1 */ - u32 rxmac_disable:1; /* bit 2 */ - u32 txmac_disable:1; /* bit 3 */ - u32 txdma_disable:1; /* bit 4 */ - u32 rxdma_disable:1; /* bit 5 */ - u32 force_ce:1; /* bit 6 */ - u32 reserved:25; /* bits 7-31 */ -#endif - } bits; -} MMC_CTRL_t, *PMMC_CTRL_t; + +#define ET_MMC_ENABLE 1 +#define ET_MMC_ARB_DISABLE 2 +#define ET_MMC_RXMAC_DISABLE 4 +#define ET_MMC_TXMAC_DISABLE 8 +#define ET_MMC_TXDMA_DISABLE 16 +#define ET_MMC_RXDMA_DISABLE 32 +#define ET_MMC_FORCE_CE 64 /* * structure for Main Memory Controller Host Memory Access Address reg in mmc @@ -2329,7 +2313,7 @@ typedef union _MMC_SRAM_ACCESS_t { * Memory Control Module of JAGCore Address Mapping */ typedef struct _MMC_t { /* Location: */ - MMC_CTRL_t mmc_ctrl; /* 0x7000 */ + u32 mmc_ctrl; /* 0x7000 */ MMC_SRAM_ACCESS_t sram_access; /* 0x7004 */ u32 sram_word1; /* 0x7008 */ u32 sram_word2; /* 0x700C */ |
