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authorGiedrius Statkevičius <giedrius.statkevicius@gmail.com>2015-03-13 15:56:34 +0200
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2015-03-24 15:41:00 +0100
commit3b84f2d910ff918ef88e920c0d23b6b8d8fa48cd (patch)
tree61f103d620d7a2e8d6d6924f90a2f48c5e56c1fd /drivers/staging/dgnc
parent20dad752850cd2b512f3ba48a5d9a13b15dabdf9 (diff)
downloadop-kernel-dev-3b84f2d910ff918ef88e920c0d23b6b8d8fa48cd.zip
op-kernel-dev-3b84f2d910ff918ef88e920c0d23b6b8d8fa48cd.tar.gz
dgnc: remove unused stuff from dgnc_cls.h
Remove unused defines from dgnc_cls.h Signed-off-by: Giedrius Statkevičius <giedrius.statkevicius@gmail.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/staging/dgnc')
-rw-r--r--drivers/staging/dgnc/dgnc_cls.h13
1 files changed, 0 insertions, 13 deletions
diff --git a/drivers/staging/dgnc/dgnc_cls.h b/drivers/staging/dgnc/dgnc_cls.h
index 85042bd..2597e36 100644
--- a/drivers/staging/dgnc/dgnc_cls.h
+++ b/drivers/staging/dgnc/dgnc_cls.h
@@ -51,15 +51,9 @@ struct cls_uart_struct {
#define UART_EXAR654_ENHANCED_REGISTER_SET 0xBF
-#define UART_16654_FCR_TXTRIGGER_8 0x0
#define UART_16654_FCR_TXTRIGGER_16 0x10
-#define UART_16654_FCR_TXTRIGGER_32 0x20
-#define UART_16654_FCR_TXTRIGGER_56 0x30
-
-#define UART_16654_FCR_RXTRIGGER_8 0x0
#define UART_16654_FCR_RXTRIGGER_16 0x40
#define UART_16654_FCR_RXTRIGGER_56 0x80
-#define UART_16654_FCR_RXTRIGGER_60 0xC0
/* Received CTS/RTS change of state */
#define UART_IIR_CTSRTS 0x20
@@ -76,13 +70,6 @@ struct cls_uart_struct {
#define UART_EXAR654_EFR_IXOFF 0x8 /* Transmit Xon1/Xoff1 */
#define UART_EXAR654_EFR_RTSDTR 0x40 /* Auto RTS/DTR Flow Control Enable */
#define UART_EXAR654_EFR_CTSDSR 0x80 /* Auto CTS/DSR Flow COntrol Enable */
-
-/* Indicates whether chip saw an incoming XOFF char */
-#define UART_EXAR654_XOFF_DETECT 0x1
-
-/* Indicates whether chip saw an incoming XON char */
-#define UART_EXAR654_XON_DETECT 0x2
-
#define UART_EXAR654_IER_XOFF 0x20 /* Xoff Interrupt Enable */
#define UART_EXAR654_IER_RTSDTR 0x40 /* Output Interrupt Enable */
#define UART_EXAR654_IER_CTSDSR 0x80 /* Input Interrupt Enable */
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