staging: brcm80211: fix "ERROR: open brace '{' following function dec..."

Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>

9 files changed, 158 insertions, 79 deletions

diff --git a/drivers/staging/brcm80211/util/aiutils.c b/drivers/staging/brcm80211/util/aiutils.c
index 0078884..43bb852 100644
--- a/drivers/staging/brcm80211/util/aiutils.c
+++ b/drivers/staging/brcm80211/util/aiutils.c
@@ -105,7 +105,8 @@ static void ai_hwfixup(si_info_t *sii)
 }
 
 /* parse the enumeration rom to identify all cores */
-void BCMATTACHFN(ai_scan) (si_t *sih, void *regs, uint devid) {
+void BCMATTACHFN(ai_scan) (si_t *sih, void *regs, uint devid)
+{
 	si_info_t *sii = SI_INFO(sih);
 	chipcregs_t *cc = (chipcregs_t *) regs;
 	uint32 erombase, *eromptr, *eromlim;
diff --git a/drivers/staging/brcm80211/util/bcmotp.c b/drivers/staging/brcm80211/util/bcmotp.c
index 88e8720..f76e64e 100644
--- a/drivers/staging/brcm80211/util/bcmotp.c
+++ b/drivers/staging/brcm80211/util/bcmotp.c
@@ -233,7 +233,8 @@ static int ipxotp_max_rgnsz(si_t *sih, int osizew)
 	return ret;
 }
 
-static void BCMNMIATTACHFN(_ipxotp_init) (otpinfo_t *oi, chipcregs_t *cc) {
+static void BCMNMIATTACHFN(_ipxotp_init) (otpinfo_t *oi, chipcregs_t *cc)
+{
 	uint k;
 	uint32 otpp, st;
 
@@ -302,7 +303,8 @@ static void BCMNMIATTACHFN(_ipxotp_init) (otpinfo_t *oi, chipcregs_t *cc) {
 	oi->flim = oi->wsize;
 }
 
-static void *BCMNMIATTACHFN(ipxotp_init) (si_t *sih) {
+static void *BCMNMIATTACHFN(ipxotp_init) (si_t *sih)
+{
 	uint idx;
 	chipcregs_t *cc;
 	otpinfo_t *oi;
@@ -623,7 +625,8 @@ static uint16 hndotp_read_bit(void *oh, chipcregs_t *cc, uint idx)
 	return (uint16) st;
 }
 
-static void *BCMNMIATTACHFN(hndotp_init) (si_t *sih) {
+static void *BCMNMIATTACHFN(hndotp_init) (si_t *sih)
+{
 	uint idx;
 	chipcregs_t *cc;
 	otpinfo_t *oi;
@@ -885,7 +888,8 @@ uint16 otp_read_bit(void *oh, uint offset)
 	return readBit;
 }
 
-void *BCMNMIATTACHFN(otp_init) (si_t *sih) {
+void *BCMNMIATTACHFN(otp_init) (si_t *sih)
+{
 	otpinfo_t *oi;
 	void *ret = NULL;
 
diff --git a/drivers/staging/brcm80211/util/bcmsrom.c b/drivers/staging/brcm80211/util/bcmsrom.c
index 31f6ad8..f922a5c 100644
--- a/drivers/staging/brcm80211/util/bcmsrom.c
+++ b/drivers/staging/brcm80211/util/bcmsrom.c
@@ -90,13 +90,15 @@ static int initvars_table(osl_t *osh, char *start, char *end, char **vars,
 static int initvars_flash(si_t *sih, osl_t *osh, char **vp, uint len);
 
 /* Initialization of varbuf structure */
-static void BCMATTACHFN(varbuf_init) (varbuf_t *b, char *buf, uint size) {
+static void BCMATTACHFN(varbuf_init) (varbuf_t *b, char *buf, uint size)
+{
 	b->size = size;
 	b->base = b->buf = buf;
 }
 
 /* append a null terminated var=value string */
-static int BCMATTACHFN(varbuf_append) (varbuf_t *b, const char *fmt, ...) {
+static int BCMATTACHFN(varbuf_append) (varbuf_t *b, const char *fmt, ...)
+{
 	va_list ap;
 	int r;
 	size_t len;
@@ -1582,7 +1584,8 @@ BCMATTACHFN(initvars_table) (osl_t *osh, char *start, char *end, char **vars,
  * Return 0 on success, nonzero on error.
  */
 static int
-BCMATTACHFN(initvars_flash) (si_t *sih, osl_t *osh, char **base, uint len) {
+BCMATTACHFN(initvars_flash) (si_t *sih, osl_t *osh, char **base, uint len)
+{
 	char *vp = *base;
 	char *flash;
 	int err;
@@ -1638,7 +1641,8 @@ BCMATTACHFN(initvars_flash) (si_t *sih, osl_t *osh, char **base, uint len) {
  * Return 0 on success, nonzero on error.
  */
 static int
-BCMATTACHFN(initvars_flash_si) (si_t *sih, char **vars, uint *count) {
+BCMATTACHFN(initvars_flash_si) (si_t *sih, char **vars, uint *count)
+{
 	osl_t *osh = si_osh(sih);
 	char *vp, *base;
 	int err;
@@ -1992,7 +1996,8 @@ BCMATTACHFN(initvars_srom_pci) (si_t *sih, void *curmap, char **vars,
  * Return 0 on success, nonzero on error.
  */
 static int
-BCMATTACHFN(initvars_cis_sdio) (osl_t *osh, char **vars, uint *count) {
+BCMATTACHFN(initvars_cis_sdio) (osl_t *osh, char **vars, uint *count)
+{
 	uint8 *cis[SBSDIO_NUM_FUNCTION + 1];
 	uint fn, numfn;
 	int rc = 0;
@@ -2026,7 +2031,8 @@ BCMATTACHFN(initvars_cis_sdio) (osl_t *osh, char **vars, uint *count) {
 }
 
 /* set SDIO sprom command register */
-static int BCMATTACHFN(sprom_cmd_sdio) (osl_t *osh, uint8 cmd) {
+static int BCMATTACHFN(sprom_cmd_sdio) (osl_t *osh, uint8 cmd)
+{
 	uint8 status = 0;
 	uint wait_cnt = 1000;
 
diff --git a/drivers/staging/brcm80211/util/bcmutils.c b/drivers/staging/brcm80211/util/bcmutils.c
index dc79705..73f3bb8 100644
--- a/drivers/staging/brcm80211/util/bcmutils.c
+++ b/drivers/staging/brcm80211/util/bcmutils.c
@@ -525,7 +525,8 @@ const unsigned char bcm_ctype[] = {
 	_BCM_L, _BCM_L, _BCM_L, _BCM_L, _BCM_L	/* 240-255 */
 };
 
-ulong BCMROMFN(bcm_strtoul) (char *cp, char **endp, uint base) {
+ulong BCMROMFN(bcm_strtoul) (char *cp, char **endp, uint base)
+{
 	ulong result, last_result = 0, value;
 	bool minus;
 
@@ -580,12 +581,14 @@ ulong BCMROMFN(bcm_strtoul) (char *cp, char **endp, uint base) {
 	return (result);
 }
 
-int BCMROMFN(bcm_atoi) (char *s) {
+int BCMROMFN(bcm_atoi) (char *s)
+{
 	return (int)bcm_strtoul(s, NULL, 10);
 }
 
 /* return pointer to location of substring 'needle' in 'haystack' */
-char *BCMROMFN(bcmstrstr) (char *haystack, char *needle) {
+char *BCMROMFN(bcmstrstr) (char *haystack, char *needle)
+{
 	int len, nlen;
 	int i;
 
@@ -601,7 +604,8 @@ char *BCMROMFN(bcmstrstr) (char *haystack, char *needle) {
 	return (NULL);
 }
 
-char *BCMROMFN(bcmstrcat) (char *dest, const char *src) {
+char *BCMROMFN(bcmstrcat) (char *dest, const char *src)
+{
 	char *p;
 
 	p = dest + strlen(dest);
@@ -611,7 +615,8 @@ char *BCMROMFN(bcmstrcat) (char *dest, const char *src) {
 	return (dest);
 }
 
-char *BCMROMFN(bcmstrncat) (char *dest, const char *src, uint size) {
+char *BCMROMFN(bcmstrncat) (char *dest, const char *src, uint size)
+{
 	char *endp;
 	char *p;
 
@@ -778,7 +783,8 @@ int bcmstrnicmp(const char *s1, const char *s2, int cnt)
 }
 
 /* parse a xx:xx:xx:xx:xx:xx format ethernet address */
-int BCMROMFN(bcm_ether_atoe) (char *p, struct ether_addr *ea) {
+int BCMROMFN(bcm_ether_atoe) (char *p, struct ether_addr *ea)
+{
 	int i = 0;
 
 	for (;;) {
@@ -959,7 +965,8 @@ const char *bcmerrorstr(int bcmerror)
 }
 
 #ifdef WLC_LOW
-static void BCMINITFN(bcm_nvram_refresh) (char *flash) {
+static void BCMINITFN(bcm_nvram_refresh) (char *flash)
+{
 	int i;
 	int ret = 0;
 
@@ -998,7 +1005,8 @@ char *bcm_nvram_vars(uint *length)
 }
 
 /* copy nvram vars into locally-allocated multi-string array */
-int BCMINITFN(bcm_nvram_cache) (void *sih) {
+int BCMINITFN(bcm_nvram_cache) (void *sih)
+{
 	int ret = 0;
 	void *osh;
 	char *flash = NULL;
@@ -1254,7 +1262,8 @@ uint16 BCMROMFN(hndcrc16) (uint8 *pdata,	/* pointer to array of data to process
  * *buflen is not modified if the TLV elt parameter is invalid, or is decremented
  * by the TLV parameter's length if it is valid.
  */
-bcm_tlv_t *BCMROMFN(bcm_next_tlv) (bcm_tlv_t *elt, int *buflen) {
+bcm_tlv_t *BCMROMFN(bcm_next_tlv) (bcm_tlv_t *elt, int *buflen)
+{
 	int len;
 
 	/* validate current elt */
@@ -1278,7 +1287,8 @@ bcm_tlv_t *BCMROMFN(bcm_next_tlv) (bcm_tlv_t *elt, int *buflen) {
  * triples, returning a pointer to the substring whose first element
  * matches tag
  */
-bcm_tlv_t *BCMROMFN(bcm_parse_tlvs) (void *buf, int buflen, uint key) {
+bcm_tlv_t *BCMROMFN(bcm_parse_tlvs) (void *buf, int buflen, uint key)
+{
 	bcm_tlv_t *elt;
 	int totlen;
 
@@ -1306,7 +1316,8 @@ bcm_tlv_t *BCMROMFN(bcm_parse_tlvs) (void *buf, int buflen, uint key) {
  * matches tag.  Stop parsing when we see an element whose ID is greater
  * than the target key.
  */
-bcm_tlv_t *BCMROMFN(bcm_parse_ordered_tlvs) (void *buf, int buflen, uint key) {
+bcm_tlv_t *BCMROMFN(bcm_parse_ordered_tlvs) (void *buf, int buflen, uint key)
+{
 	bcm_tlv_t *elt;
 	int totlen;
 
@@ -1589,7 +1600,8 @@ static const uint16 nqdBm_to_mW_map[QDBM_TABLE_LEN] = {
 /* 185: */ 42170, 44668, 47315, 50119, 53088, 56234, 59566, 63096
 };
 
-uint16 BCMROMFN(bcm_qdbm_to_mw) (uint8 qdbm) {
+uint16 BCMROMFN(bcm_qdbm_to_mw) (uint8 qdbm)
+{
 	uint factor = 1;
 	int idx = qdbm - QDBM_OFFSET;
 
@@ -1612,7 +1624,8 @@ uint16 BCMROMFN(bcm_qdbm_to_mw) (uint8 qdbm) {
 	return ((nqdBm_to_mW_map[idx] + factor / 2) / factor);
 }
 
-uint8 BCMROMFN(bcm_mw_to_qdbm) (uint16 mw) {
+uint8 BCMROMFN(bcm_mw_to_qdbm) (uint16 mw)
+{
 	uint8 qdbm;
 	int offset;
 	uint mw_uint = mw;
@@ -1642,7 +1655,8 @@ uint8 BCMROMFN(bcm_mw_to_qdbm) (uint16 mw) {
 	return (qdbm);
 }
 
-uint BCMROMFN(bcm_bitcount) (uint8 *bitmap, uint length) {
+uint BCMROMFN(bcm_bitcount) (uint8 *bitmap, uint length)
+{
 	uint bitcount = 0, i;
 	uint8 tmp;
 	for (i = 0; i < length; i++) {
diff --git a/drivers/staging/brcm80211/util/bcmwpa.c b/drivers/staging/brcm80211/util/bcmwpa.c
index 29a4823..a78be43 100644
--- a/drivers/staging/brcm80211/util/bcmwpa.c
+++ b/drivers/staging/brcm80211/util/bcmwpa.c
@@ -39,7 +39,8 @@ bool bcm_is_wfa_ie(uint8 *ie, uint8 **tlvs, uint *tlvs_len, uint8 type)
 	return FALSE;
 }
 
-wpa_ie_fixed_t *BCMROMFN(bcm_find_wpaie) (uint8 * parse, uint len) {
+wpa_ie_fixed_t *BCMROMFN(bcm_find_wpaie) (uint8 * parse, uint len)
+{
 	bcm_tlv_t *ie;
 
 	while ((ie = bcm_parse_tlvs(parse, len, DOT11_MNG_VS_ID))) {
diff --git a/drivers/staging/brcm80211/util/hndpmu.c b/drivers/staging/brcm80211/util/hndpmu.c
index e0d54d9..9ec07e7 100644
--- a/drivers/staging/brcm80211/util/hndpmu.c
+++ b/drivers/staging/brcm80211/util/hndpmu.c
@@ -182,7 +182,8 @@ BCMATTACHFN(si_pmu_set_ldo_voltage) (si_t *sih, osl_t *osh, uint8 ldo,
 /* d11 slow to fast clock transition time in slow clock cycles */
 #define D11SCC_SLOW2FAST_TRANSITION	2
 
-uint16 BCMINITFN(si_pmu_fast_pwrup_delay) (si_t *sih, osl_t *osh) {
+uint16 BCMINITFN(si_pmu_fast_pwrup_delay) (si_t *sih, osl_t *osh)
+{
 	uint delay = PMU_MAX_TRANSITION_DLY;
 	chipcregs_t *cc;
 	uint origidx;
@@ -258,7 +259,8 @@ uint16 BCMINITFN(si_pmu_fast_pwrup_delay) (si_t *sih, osl_t *osh) {
 	return (uint16) delay;
 }
 
-uint32 BCMATTACHFN(si_pmu_force_ilp) (si_t *sih, osl_t *osh, bool force) {
+uint32 BCMATTACHFN(si_pmu_force_ilp) (si_t *sih, osl_t *osh, bool force)
+{
 	chipcregs_t *cc;
 	uint origidx;
 	uint32 oldpmucontrol;
@@ -578,23 +580,27 @@ static const pmu_res_depend_t BCMATTACHDATA(bcm4330a0_res_depend)[] =
 };
 
 /* TRUE if the power topology uses the buck boost to provide 3.3V to VDDIO_RF and WLAN PA */
-static bool BCMATTACHFN(si_pmu_res_depfltr_bb) (si_t *sih) {
+static bool BCMATTACHFN(si_pmu_res_depfltr_bb) (si_t *sih)
+{
 	return (sih->boardflags & BFL_BUCKBOOST) != 0;
 }
 
 /* TRUE if the power topology doesn't use the cbuck. Key on chiprev also if the chip is BCM4325. */
-static bool BCMATTACHFN(si_pmu_res_depfltr_ncb) (si_t *sih) {
+static bool BCMATTACHFN(si_pmu_res_depfltr_ncb) (si_t *sih)
+{
 
 	return ((sih->boardflags & BFL_NOCBUCK) != 0);
 }
 
 /* TRUE if the power topology uses the PALDO */
-static bool BCMATTACHFN(si_pmu_res_depfltr_paldo) (si_t *sih) {
+static bool BCMATTACHFN(si_pmu_res_depfltr_paldo) (si_t *sih)
+{
 	return (sih->boardflags & BFL_PALDO) != 0;
 }
 
 /* TRUE if the power topology doesn't use the PALDO */
-static bool BCMATTACHFN(si_pmu_res_depfltr_npaldo) (si_t *sih) {
+static bool BCMATTACHFN(si_pmu_res_depfltr_npaldo) (si_t *sih)
+{
 	return (sih->boardflags & BFL_PALDO) == 0;
 }
 
@@ -688,7 +694,8 @@ static void si_pmu_res_masks(si_t *sih, uint32 * pmin, uint32 * pmax)
 }
 
 /* initialize PMU resources */
-void BCMATTACHFN(si_pmu_res_init) (si_t *sih, osl_t *osh) {
+void BCMATTACHFN(si_pmu_res_init) (si_t *sih, osl_t *osh)
+{
 	chipcregs_t *cc;
 	uint origidx;
 	const pmu_res_updown_t *pmu_res_updown_table = NULL;
@@ -1104,7 +1111,8 @@ static const pmu1_xtaltab0_t BCMINITDATA(pmu1_xtaltab0_960)[] =
 #define PMU1_XTALTAB0_960_48000K	15
 
 /* select xtal table for each chip */
-static const pmu1_xtaltab0_t *BCMINITFN(si_pmu1_xtaltab0) (si_t *sih) {
+static const pmu1_xtaltab0_t *BCMINITFN(si_pmu1_xtaltab0) (si_t *sih)
+{
 #ifdef BCMDBG
 	char chn[8];
 #endif
@@ -1130,7 +1138,8 @@ static const pmu1_xtaltab0_t *BCMINITFN(si_pmu1_xtaltab0) (si_t *sih) {
 }
 
 /* select default xtal frequency for each chip */
-static const pmu1_xtaltab0_t *BCMINITFN(si_pmu1_xtaldef0) (si_t *sih) {
+static const pmu1_xtaltab0_t *BCMINITFN(si_pmu1_xtaldef0) (si_t *sih)
+{
 #ifdef BCMDBG
 	char chn[8];
 #endif
@@ -1161,7 +1170,8 @@ static const pmu1_xtaltab0_t *BCMINITFN(si_pmu1_xtaldef0) (si_t *sih) {
 }
 
 /* select default pll fvco for each chip */
-static uint32 BCMINITFN(si_pmu1_pllfvco0) (si_t *sih) {
+static uint32 BCMINITFN(si_pmu1_pllfvco0) (si_t *sih)
+{
 #ifdef BCMDBG
 	char chn[8];
 #endif
@@ -1189,7 +1199,8 @@ static uint32 BCMINITFN(si_pmu1_pllfvco0) (si_t *sih) {
 
 /* query alp/xtal clock frequency */
 static uint32
-BCMINITFN(si_pmu1_alpclk0) (si_t *sih, osl_t *osh, chipcregs_t *cc) {
+BCMINITFN(si_pmu1_alpclk0) (si_t *sih, osl_t *osh, chipcregs_t *cc)
+{
 	const pmu1_xtaltab0_t *xt;
 	uint32 xf;
 
@@ -1459,7 +1470,8 @@ BCMATTACHFN(si_pmu1_pllinit0) (si_t *sih, osl_t *osh, chipcregs_t *cc,
 
 /* query the CPU clock frequency */
 static uint32
-BCMINITFN(si_pmu1_cpuclk0) (si_t *sih, osl_t *osh, chipcregs_t *cc) {
+BCMINITFN(si_pmu1_cpuclk0) (si_t *sih, osl_t *osh, chipcregs_t *cc)
+{
 	uint32 tmp, m1div;
 #ifdef BCMDBG
 	uint32 ndiv_int, ndiv_frac, p2div, p1div, fvco;
@@ -1512,7 +1524,8 @@ BCMINITFN(si_pmu1_cpuclk0) (si_t *sih, osl_t *osh, chipcregs_t *cc) {
 }
 
 /* initialize PLL */
-void BCMATTACHFN(si_pmu_pll_init) (si_t *sih, osl_t *osh, uint xtalfreq) {
+void BCMATTACHFN(si_pmu_pll_init) (si_t *sih, osl_t *osh, uint xtalfreq)
+{
 	chipcregs_t *cc;
 	uint origidx;
 #ifdef BCMDBG
@@ -1564,7 +1577,8 @@ void BCMATTACHFN(si_pmu_pll_init) (si_t *sih, osl_t *osh, uint xtalfreq) {
 }
 
 /* query alp/xtal clock frequency */
-uint32 BCMINITFN(si_pmu_alp_clock) (si_t *sih, osl_t *osh) {
+uint32 BCMINITFN(si_pmu_alp_clock) (si_t *sih, osl_t *osh)
+{
 	chipcregs_t *cc;
 	uint origidx;
 	uint32 clock = ALP_CLOCK;
@@ -1677,7 +1691,8 @@ BCMINITFN(si_pmu5_clock) (si_t *sih, osl_t *osh, chipcregs_t *cc, uint pll0,
 /* For designs that feed the same clock to both backplane
  * and CPU just return the CPU clock speed.
  */
-uint32 BCMINITFN(si_pmu_si_clock) (si_t *sih, osl_t *osh) {
+uint32 BCMINITFN(si_pmu_si_clock) (si_t *sih, osl_t *osh)
+{
 	chipcregs_t *cc;
 	uint origidx;
 	uint32 clock = HT_CLOCK;
@@ -1755,7 +1770,8 @@ uint32 BCMINITFN(si_pmu_si_clock) (si_t *sih, osl_t *osh) {
 }
 
 /* query CPU clock frequency */
-uint32 BCMINITFN(si_pmu_cpu_clock) (si_t *sih, osl_t *osh) {
+uint32 BCMINITFN(si_pmu_cpu_clock) (si_t *sih, osl_t *osh)
+{
 	chipcregs_t *cc;
 	uint origidx;
 	uint32 clock;
@@ -1798,7 +1814,8 @@ uint32 BCMINITFN(si_pmu_cpu_clock) (si_t *sih, osl_t *osh) {
 }
 
 /* query memory clock frequency */
-uint32 BCMINITFN(si_pmu_mem_clock) (si_t *sih, osl_t *osh) {
+uint32 BCMINITFN(si_pmu_mem_clock) (si_t *sih, osl_t *osh)
+{
 	chipcregs_t *cc;
 	uint origidx;
 	uint32 clock;
@@ -1846,7 +1863,8 @@ uint32 BCMINITFN(si_pmu_mem_clock) (si_t *sih, osl_t *osh) {
 
 static uint32 ilpcycles_per_sec = 0;
 
-uint32 BCMINITFN(si_pmu_ilp_clock) (si_t *sih, osl_t *osh) {
+uint32 BCMINITFN(si_pmu_ilp_clock) (si_t *sih, osl_t *osh)
+{
 	if (ISSIM_ENAB(sih))
 		return ILP_CLOCK;
 
@@ -1969,7 +1987,8 @@ BCMINITFN(si_sdiod_drive_strength_init) (si_t *sih, osl_t *osh,
 }
 
 /* initialize PMU */
-void BCMATTACHFN(si_pmu_init) (si_t *sih, osl_t *osh) {
+void BCMATTACHFN(si_pmu_init) (si_t *sih, osl_t *osh)
+{
 	chipcregs_t *cc;
 	uint origidx;
 
@@ -2513,7 +2532,8 @@ BCMATTACHFN(si_pmu_sprom_enable) (si_t *sih, osl_t *osh, bool enable)
 }
 
 /* initialize PMU chip controls and other chip level stuff */
-void BCMATTACHFN(si_pmu_chip_init) (si_t *sih, osl_t *osh) {
+void BCMATTACHFN(si_pmu_chip_init) (si_t *sih, osl_t *osh)
+{
 	uint origidx;
 
 	ASSERT(sih->cccaps & CC_CAP_PMU);
@@ -2534,7 +2554,8 @@ void BCMATTACHFN(si_pmu_chip_init) (si_t *sih, osl_t *osh) {
 }
 
 /* initialize PMU switch/regulators */
-void BCMATTACHFN(si_pmu_swreg_init) (si_t *sih, osl_t *osh) {
+void BCMATTACHFN(si_pmu_swreg_init) (si_t *sih, osl_t *osh)
+{
 	ASSERT(sih->cccaps & CC_CAP_PMU);
 
 	switch (CHIPID(sih->chip)) {
@@ -2606,7 +2627,8 @@ si_pmu_waitforclk_on_backplane(si_t *sih, osl_t *osh, uint32 clk,
 
 #define EXT_ILP_HZ 32768
 
-uint32 BCMATTACHFN(si_pmu_measure_alpclk) (si_t *sih, osl_t *osh) {
+uint32 BCMATTACHFN(si_pmu_measure_alpclk) (si_t *sih, osl_t *osh)
+{
 	chipcregs_t *cc;
 	uint origidx;
 	uint32 alp_khz;
@@ -2653,7 +2675,8 @@ uint32 BCMATTACHFN(si_pmu_measure_alpclk) (si_t *sih, osl_t *osh) {
 	return alp_khz;
 }
 
-static void BCMATTACHFN(si_pmu_set_4330_plldivs) (si_t *sih) {
+static void BCMATTACHFN(si_pmu_set_4330_plldivs) (si_t *sih)
+{
 	uint32 FVCO = si_pmu1_pllfvco0(sih) / 1000;
 	uint32 m1div, m2div, m3div, m4div, m5div, m6div;
 	uint32 pllc1, pllc2;
diff --git a/drivers/staging/brcm80211/util/nicpci.c b/drivers/staging/brcm80211/util/nicpci.c
index 4b828ab8..67dcd21 100644
--- a/drivers/staging/brcm80211/util/nicpci.c
+++ b/drivers/staging/brcm80211/util/nicpci.c
@@ -542,7 +542,8 @@ static void pcie_war_serdes(pcicore_info_t *pi)
 
 /* Fix MISC config to allow coming out of L2/L3-Ready state w/o PRST */
 /* Needs to happen when coming out of 'standby'/'hibernate' */
-static void BCMINITFN(pcie_misc_config_fixup) (pcicore_info_t *pi) {
+static void BCMINITFN(pcie_misc_config_fixup) (pcicore_info_t *pi)
+{
 	sbpcieregs_t *pcieregs = pi->regs.pcieregs;
 	uint16 val16, *reg16;
 
@@ -637,7 +638,8 @@ void pcie_war_ovr_aspm_update(void *pch, uint8 aspm)
 }
 
 /* ***** Functions called during driver state changes ***** */
-void BCMATTACHFN(pcicore_attach) (void *pch, char *pvars, int state) {
+void BCMATTACHFN(pcicore_attach) (void *pch, char *pvars, int state)
+{
 	pcicore_info_t *pi = (pcicore_info_t *) pch;
 	si_t *sih = pi->sih;
 
diff --git a/drivers/staging/brcm80211/util/nvram/nvram_ro.c b/drivers/staging/brcm80211/util/nvram/nvram_ro.c
index 4e538ac..941fed3 100644
--- a/drivers/staging/brcm80211/util/nvram/nvram_ro.c
+++ b/drivers/staging/brcm80211/util/nvram/nvram_ro.c
@@ -46,7 +46,8 @@ static char *findvar(char *vars, char *lim, const char *name);
 
 #if defined(FLASH)
 /* copy flash to ram */
-static void BCMINITFN(get_flash_nvram) (si_t *sih, struct nvram_header *nvh) {
+static void BCMINITFN(get_flash_nvram) (si_t *sih, struct nvram_header *nvh)
+{
 	osl_t *osh;
 	uint nvs, bufsz;
 	vars_t *new;
@@ -74,7 +75,8 @@ static void BCMINITFN(get_flash_nvram) (si_t *sih, struct nvram_header *nvh) {
 }
 #endif				/* FLASH */
 
-int BCMATTACHFN(nvram_init) (void *si) {
+int BCMATTACHFN(nvram_init) (void *si)
+{
 
 	/* Make sure we read nvram in flash just once before freeing the memory */
 	if (vars != NULL) {
@@ -84,7 +86,8 @@ int BCMATTACHFN(nvram_init) (void *si) {
 	return 0;
 }
 
-int BCMATTACHFN(nvram_append) (void *si, char *varlst, uint varsz) {
+int BCMATTACHFN(nvram_append) (void *si, char *varlst, uint varsz)
+{
 	uint bufsz = VARS_T_OH;
 	vars_t *new;
 
@@ -100,7 +103,8 @@ int BCMATTACHFN(nvram_append) (void *si, char *varlst, uint varsz) {
 	return BCME_OK;
 }
 
-void BCMUNINITFN(nvram_exit) (void *si) {
+void BCMUNINITFN(nvram_exit) (void *si)
+{
 	vars_t *this, *next;
 	si_t *sih;
 
@@ -147,19 +151,23 @@ char *nvram_get(const char *name)
 	return v;
 }
 
-int BCMATTACHFN(nvram_set) (const char *name, const char *value) {
+int BCMATTACHFN(nvram_set) (const char *name, const char *value)
+{
 	return 0;
 }
 
-int BCMATTACHFN(nvram_unset) (const char *name) {
+int BCMATTACHFN(nvram_unset) (const char *name)
+{
 	return 0;
 }
 
-int BCMATTACHFN(nvram_reset) (void *si) {
+int BCMATTACHFN(nvram_reset) (void *si)
+{
 	return 0;
 }
 
-int BCMATTACHFN(nvram_commit) (void) {
+int BCMATTACHFN(nvram_commit) (void)
+{
 	return 0;
 }
 
diff --git a/drivers/staging/brcm80211/util/siutils.c b/drivers/staging/brcm80211/util/siutils.c
index aa39893..0053707 100644
--- a/drivers/staging/brcm80211/util/siutils.c
+++ b/drivers/staging/brcm80211/util/siutils.c
@@ -290,7 +290,8 @@ BCMATTACHFN(si_buscore_setup) (si_info_t *sii, chipcregs_t *cc, uint bustype,
 	return TRUE;
 }
 
-static void BCMATTACHFN(si_nvram_process) (si_info_t *sii, char *pvars) {
+static void BCMATTACHFN(si_nvram_process) (si_info_t *sii, char *pvars)
+{
 	uint w = 0;
 
 	/* get boardtype and boardrev */
@@ -666,7 +667,8 @@ static si_info_t *BCMATTACHFN(si_doattach) (si_info_t *sii, uint devid,
 #endif				/* BCMSDIO */
 
 /* may be called with core in reset */
-void BCMATTACHFN(si_detach) (si_t *sih) {
+void BCMATTACHFN(si_detach) (si_t *sih)
+{
 	si_info_t *sii;
 	uint idx;
 
@@ -1108,7 +1110,8 @@ int si_corebist(si_t *sih)
 	return result;
 }
 
-static uint32 BCMINITFN(factor6) (uint32 x) {
+static uint32 BCMINITFN(factor6) (uint32 x)
+{
 	switch (x) {
 	case CC_F6_2:
 		return 2;
@@ -1128,7 +1131,8 @@ static uint32 BCMINITFN(factor6) (uint32 x) {
 }
 
 /* calculate the speed the SI would run at given a set of clockcontrol values */
-uint32 BCMINITFN(si_clock_rate) (uint32 pll_type, uint32 n, uint32 m) {
+uint32 BCMINITFN(si_clock_rate) (uint32 pll_type, uint32 n, uint32 m)
+{
 	uint32 n1, n2, clock, m1, m2, m3, mc;
 
 	n1 = n & CN_N1_MASK;
@@ -1212,7 +1216,8 @@ uint32 BCMINITFN(si_clock_rate) (uint32 pll_type, uint32 n, uint32 m) {
 	}
 }
 
-uint32 BCMINITFN(si_clock) (si_t *sih) {
+uint32 BCMINITFN(si_clock) (si_t *sih)
+{
 	si_info_t *sii;
 	chipcregs_t *cc;
 	uint32 n, m;
@@ -1254,14 +1259,16 @@ uint32 BCMINITFN(si_clock) (si_t *sih) {
 	return rate;
 }
 
-uint32 BCMINITFN(si_alp_clock) (si_t *sih) {
+uint32 BCMINITFN(si_alp_clock) (si_t *sih)
+{
 	if (PMUCTL_ENAB(sih))
 		return si_pmu_alp_clock(sih, si_osh(sih));
 
 	return ALP_CLOCK;
 }
 
-uint32 BCMINITFN(si_ilp_clock) (si_t *sih) {
+uint32 BCMINITFN(si_ilp_clock) (si_t *sih)
+{
 	if (PMUCTL_ENAB(sih))
 		return si_pmu_ilp_clock(sih, si_osh(sih));
 
@@ -1318,7 +1325,8 @@ void si_watchdog_ms(si_t *sih, uint32 ms)
 	si_watchdog(sih, wd_msticks * ms);
 }
 
-uint16 BCMATTACHFN(si_d11_devid) (si_t *sih) {
+uint16 BCMATTACHFN(si_d11_devid) (si_t *sih)
+{
 	si_info_t *sii = SI_INFO(sih);
 	uint16 device;
 
@@ -1398,7 +1406,8 @@ static uint si_slowclk_freq(si_info_t *sii, bool max_freq, chipcregs_t *cc)
 	return (0);
 }
 
-static void BCMINITFN(si_clkctl_setdelay) (si_info_t *sii, void *chipcregs) {
+static void BCMINITFN(si_clkctl_setdelay) (si_info_t *sii, void *chipcregs)
+{
 	chipcregs_t *cc = (chipcregs_t *) chipcregs;
 	uint slowmaxfreq, pll_delay, slowclk;
 	uint pll_on_delay, fref_sel_delay;
@@ -1425,7 +1434,8 @@ static void BCMINITFN(si_clkctl_setdelay) (si_info_t *sii, void *chipcregs) {
 }
 
 /* initialize power control delay registers */
-void BCMINITFN(si_clkctl_init) (si_t *sih) {
+void BCMINITFN(si_clkctl_init) (si_t *sih)
+{
 	si_info_t *sii;
 	uint origidx = 0;
 	chipcregs_t *cc;
@@ -1457,7 +1467,8 @@ void BCMINITFN(si_clkctl_init) (si_t *sih) {
 }
 
 /* return the value suitable for writing to the dot11 core FAST_PWRUP_DELAY register */
-uint16 BCMINITFN(si_clkctl_fast_pwrup_delay) (si_t *sih) {
+uint16 BCMINITFN(si_clkctl_fast_pwrup_delay) (si_t *sih)
+{
 	si_info_t *sii;
 	uint origidx = 0;
 	chipcregs_t *cc;
@@ -1692,7 +1703,8 @@ static bool _si_clkctl_cc(si_info_t *sii, uint mode)
 }
 
 /* Build device path. Support SI, PCI, and JTAG for now. */
-int BCMATTACHFN(si_devpath) (si_t *sih, char *path, int size) {
+int BCMATTACHFN(si_devpath) (si_t *sih, char *path, int size)
+{
 	int slen;
 
 	ASSERT(path != NULL);
@@ -1734,7 +1746,8 @@ int BCMATTACHFN(si_devpath) (si_t *sih, char *path, int size) {
 }
 
 /* Get a variable, but only if it has a devpath prefix */
-char *BCMATTACHFN(si_getdevpathvar) (si_t *sih, const char *name) {
+char *BCMATTACHFN(si_getdevpathvar) (si_t *sih, const char *name)
+{
 	char varname[SI_DEVPATH_BUFSZ + 32];
 
 	si_devpathvar(sih, varname, sizeof(varname), name);
@@ -1743,7 +1756,8 @@ char *BCMATTACHFN(si_getdevpathvar) (si_t *sih, const char *name) {
 }
 
 /* Get a variable, but only if it has a devpath prefix */
-int BCMATTACHFN(si_getdevpathintvar) (si_t *sih, const char *name) {
+int BCMATTACHFN(si_getdevpathintvar) (si_t *sih, const char *name)
+{
 #if defined(BCMBUSTYPE) && (BCMBUSTYPE == SI_BUS)
 	return (getintvar(NULL, name));
 #else
@@ -1903,7 +1917,8 @@ void si_sdio_init(si_t *sih)
 }
 #endif				/* BCMSDIO */
 
-bool BCMATTACHFN(si_pci_war16165) (si_t *sih) {
+bool BCMATTACHFN(si_pci_war16165) (si_t *sih)
+{
 	si_info_t *sii;
 
 	sii = SI_INFO(sih);
@@ -1938,7 +1953,8 @@ void si_chippkg_set(si_t *sih, uint val)
 	sii->pub.chippkg = val;
 }
 
-void BCMINITFN(si_pci_up) (si_t *sih) {
+void BCMINITFN(si_pci_up) (si_t *sih)
+{
 	si_info_t *sii;
 
 	sii = SI_INFO(sih);
@@ -1956,7 +1972,8 @@ void BCMINITFN(si_pci_up) (si_t *sih) {
 }
 
 /* Unconfigure and/or apply various WARs when system is going to sleep mode */
-void BCMUNINITFN(si_pci_sleep) (si_t *sih) {
+void BCMUNINITFN(si_pci_sleep) (si_t *sih)
+{
 	si_info_t *sii;
 
 	sii = SI_INFO(sih);
@@ -1965,7 +1982,8 @@ void BCMUNINITFN(si_pci_sleep) (si_t *sih) {
 }
 
 /* Unconfigure and/or apply various WARs when going down */
-void BCMINITFN(si_pci_down) (si_t *sih) {
+void BCMINITFN(si_pci_down) (si_t *sih)
+{
 	si_info_t *sii;
 
 	sii = SI_INFO(sih);
@@ -1985,7 +2003,8 @@ void BCMINITFN(si_pci_down) (si_t *sih) {
  * Configure the pci core for pci client (NIC) action
  * coremask is the bitvec of cores by index to be enabled.
  */
-void BCMATTACHFN(si_pci_setup) (si_t *sih, uint coremask) {
+void BCMATTACHFN(si_pci_setup) (si_t *sih, uint coremask)
+{
 	si_info_t *sii;
 	sbpciregs_t *pciregs = NULL;
 	uint32 siflag = 0, w;
@@ -2404,7 +2423,8 @@ void *BCMATTACHFN(si_gpio_handler_register) (si_t *sih, uint32 event,
 	return (void *)(gi);
 }
 
-void BCMATTACHFN(si_gpio_handler_unregister) (si_t *sih, void *gpioh) {
+void BCMATTACHFN(si_gpio_handler_unregister) (si_t *sih, void *gpioh)
+{
 	si_info_t *sii;
 	gpioh_item_t *p, *n;