diff options
author | Greg Kroah-Hartman <gregkh@suse.de> | 2010-10-12 12:15:18 -0700 |
---|---|---|
committer | Greg Kroah-Hartman <gregkh@suse.de> | 2010-10-12 12:15:18 -0700 |
commit | 0f0881b09078fe3a6bc70f05e8ba49a52b2478a2 (patch) | |
tree | cbca0ae7144a4c16a260bc859420f2b2b8b2656f /drivers/staging/brcm80211/util | |
parent | f1c6b7fb708e3cb6f5e7b46916e9def728c15345 (diff) | |
download | op-kernel-dev-0f0881b09078fe3a6bc70f05e8ba49a52b2478a2.zip op-kernel-dev-0f0881b09078fe3a6bc70f05e8ba49a52b2478a2.tar.gz |
Staging: brcm80211: remove TRUE #define
use the kernel provided 'true' value instead, especially
as we are using a 'bool' for these variables.
Cc: Brett Rudley <brudley@broadcom.com>
Cc: Henry Ptasinski <henryp@broadcom.com>
Cc: Nohee Ko <noheek@broadcom.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Diffstat (limited to 'drivers/staging/brcm80211/util')
-rw-r--r-- | drivers/staging/brcm80211/util/aiutils.c | 10 | ||||
-rw-r--r-- | drivers/staging/brcm80211/util/bcmotp.c | 2 | ||||
-rw-r--r-- | drivers/staging/brcm80211/util/bcmsrom.c | 12 | ||||
-rw-r--r-- | drivers/staging/brcm80211/util/bcmwifi.c | 10 | ||||
-rw-r--r-- | drivers/staging/brcm80211/util/bcmwpa.c | 2 | ||||
-rw-r--r-- | drivers/staging/brcm80211/util/hnddma.c | 46 | ||||
-rw-r--r-- | drivers/staging/brcm80211/util/hndpmu.c | 20 | ||||
-rw-r--r-- | drivers/staging/brcm80211/util/linux_osl.c | 2 | ||||
-rw-r--r-- | drivers/staging/brcm80211/util/nicpci.c | 12 | ||||
-rw-r--r-- | drivers/staging/brcm80211/util/sbutils.c | 2 | ||||
-rw-r--r-- | drivers/staging/brcm80211/util/siutils.c | 22 |
11 files changed, 70 insertions, 70 deletions
diff --git a/drivers/staging/brcm80211/util/aiutils.c b/drivers/staging/brcm80211/util/aiutils.c index ff536b1..92573ab 100644 --- a/drivers/staging/brcm80211/util/aiutils.c +++ b/drivers/staging/brcm80211/util/aiutils.c @@ -39,7 +39,7 @@ get_erom_ent(si_t *sih, u32 **eromptr, u32 mask, u32 match) u32 ent; uint inv = 0, nom = 0; - while (TRUE) { + while (true) { ent = R_REG(si_osh(sih), *eromptr); (*eromptr)++; @@ -224,7 +224,7 @@ void ai_scan(si_t *sih, void *regs, uint devid) get_asd(sih, &eromptr, 0, 0, AD_ST_BRIDGE, &addrl, &addrh, &sizel, &sizeh); if (asd != 0) - br = TRUE; + br = true; else if ((addrh != 0) || (sizeh != 0) || (sizel != SI_CORE_SIZE)) { SI_ERROR(("First Slave ASD for core 0x%04x malformed " "(0x%08x)\n", cid, asd)); @@ -507,7 +507,7 @@ uint ai_corereg(si_t *sih, uint coreidx, uint regoff, uint mask, uint val) if (BUSTYPE(sih->bustype) == SI_BUS) { /* If internal bus, we can always get at everything */ - fast = TRUE; + fast = true; /* map if does not exist */ if (!sii->regs[coreidx]) { sii->regs[coreidx] = REG_MAP(sii->coresba[coreidx], @@ -521,14 +521,14 @@ uint ai_corereg(si_t *sih, uint coreidx, uint regoff, uint mask, uint val) if ((sii->coreid[coreidx] == CC_CORE_ID) && SI_FAST(sii)) { /* Chipc registers are mapped at 12KB */ - fast = TRUE; + fast = true; r = (u32 *) ((char *)sii->curmap + PCI_16KB0_CCREGS_OFFSET + regoff); } else if (sii->pub.buscoreidx == coreidx) { /* pci registers are at either in the last 2KB of an 8KB window * or, in pcie and pci rev 13 at 8KB */ - fast = TRUE; + fast = true; if (SI_FAST(sii)) r = (u32 *) ((char *)sii->curmap + PCI_16KB0_PCIREGS_OFFSET + diff --git a/drivers/staging/brcm80211/util/bcmotp.c b/drivers/staging/brcm80211/util/bcmotp.c index 5472fd4..fedebe2 100644 --- a/drivers/staging/brcm80211/util/bcmotp.c +++ b/drivers/staging/brcm80211/util/bcmotp.c @@ -936,7 +936,7 @@ otp_read_region(si_t *sih, int region, u16 *data, wasup = si_is_otp_powered(sih); if (!wasup) - si_otp_power(sih, TRUE); + si_otp_power(sih, true); if (!si_is_otp_powered(sih) || si_is_otp_disabled(sih)) { err = BCME_NOTREADY; diff --git a/drivers/staging/brcm80211/util/bcmsrom.c b/drivers/staging/brcm80211/util/bcmsrom.c index f5212a0..13fe173 100644 --- a/drivers/staging/brcm80211/util/bcmsrom.c +++ b/drivers/staging/brcm80211/util/bcmsrom.c @@ -410,7 +410,7 @@ int srom_parsecis(osl_t *osh, u8 *pcis[], uint ciscnt, char **vars, uint *count) cis = *pcis++; i = 0; funcid = 0; - standard_cis = TRUE; + standard_cis = true; do { if (standard_cis) { tup = cis[i++]; @@ -722,7 +722,7 @@ int srom_parsecis(osl_t *osh, u8 *pcis[], uint ciscnt, char **vars, uint *count) if (tlen >= 5) varbuf_append(&b, vstr_ag, 3, cis[i + 4]); - ag_init = TRUE; + ag_init = true; break; case HNBU_ANT5G: @@ -1340,7 +1340,7 @@ int srom_parsecis(osl_t *osh, u8 *pcis[], uint ciscnt, char **vars, uint *count) SROM3_SWRGN_OFF, &b); /* 2.4G antenna gain is included in SROM */ - ag_init = TRUE; + ag_init = true; /* Ethernet MAC address is included in SROM */ eabuf[0] = 0; boardnum = -1; @@ -1868,7 +1868,7 @@ static int initvars_srom_pci(si_t *sih, void *curmap, char **vars, uint *count) if (si_is_sprom_available(sih)) { err = sprom_read_pci(osh, sih, sromwindow, 0, srom, SROM_WORDS, - TRUE); + true); if ((srom[SROM4_SIGN] == SROM4_SIGNATURE) || (((sih->buscoretype == PCIE_CORE_ID) @@ -1878,7 +1878,7 @@ static int initvars_srom_pci(si_t *sih, void *curmap, char **vars, uint *count) /* sromrev >= 4, read more */ err = sprom_read_pci(osh, sih, sromwindow, 0, srom, - SROM4_WORDS, TRUE); + SROM4_WORDS, true); sromrev = srom[SROM4_CRCREV] & 0xff; if (err) BS_ERROR(("%s: srom %d, bad crc\n", __func__, @@ -1916,7 +1916,7 @@ static int initvars_srom_pci(si_t *sih, void *curmap, char **vars, uint *count) value = si_getdevpathvar(sih, "sromrev"); if (value) { sromrev = (u8) simple_strtoul(value, NULL, 0); - flash = TRUE; + flash = true; goto varscont; } diff --git a/drivers/staging/brcm80211/util/bcmwifi.c b/drivers/staging/brcm80211/util/bcmwifi.c index 37c26af..83e7e1e 100644 --- a/drivers/staging/brcm80211/util/bcmwifi.c +++ b/drivers/staging/brcm80211/util/bcmwifi.c @@ -26,24 +26,24 @@ * Verify the chanspec is using a legal set of parameters, i.e. that the * chanspec specified a band, bw, ctl_sb and channel and that the * combination could be legal given any set of circumstances. - * RETURNS: TRUE is the chanspec is malformed, false if it looks good. + * RETURNS: true is the chanspec is malformed, false if it looks good. */ bool wf_chspec_malformed(chanspec_t chanspec) { /* must be 2G or 5G band */ if (!CHSPEC_IS5G(chanspec) && !CHSPEC_IS2G(chanspec)) - return TRUE; + return true; /* must be 20 or 40 bandwidth */ if (!CHSPEC_IS40(chanspec) && !CHSPEC_IS20(chanspec)) - return TRUE; + return true; /* 20MHZ b/w must have no ctl sb, 40 must have a ctl sb */ if (CHSPEC_IS20(chanspec)) { if (!CHSPEC_SB_NONE(chanspec)) - return TRUE; + return true; } else { if (!CHSPEC_SB_UPPER(chanspec) && !CHSPEC_SB_LOWER(chanspec)) - return TRUE; + return true; } return FALSE; diff --git a/drivers/staging/brcm80211/util/bcmwpa.c b/drivers/staging/brcm80211/util/bcmwpa.c index 76359a2..870ae4b 100644 --- a/drivers/staging/brcm80211/util/bcmwpa.c +++ b/drivers/staging/brcm80211/util/bcmwpa.c @@ -30,7 +30,7 @@ bool bcm_is_wfa_ie(u8 *ie, u8 **tlvs, uint *tlvs_len, u8 type) if ((ie[TLV_LEN_OFF] > (WFA_OUI_LEN + 1)) && !bcmp(&ie[TLV_BODY_OFF], WFA_OUI, WFA_OUI_LEN) && type == ie[TLV_BODY_OFF + WFA_OUI_LEN]) { - return TRUE; + return true; } /* point to the next ie */ diff --git a/drivers/staging/brcm80211/util/hnddma.c b/drivers/staging/brcm80211/util/hnddma.c index d2d2d33..66c5609 100644 --- a/drivers/staging/brcm80211/util/hnddma.c +++ b/drivers/staging/brcm80211/util/hnddma.c @@ -167,7 +167,7 @@ typedef struct dma_info { /* DMA Scatter-gather list is supported. Note this is limited to TX direction only */ #ifdef BCMDMASGLISTOSL -#define DMASGLIST_ENAB TRUE +#define DMASGLIST_ENAB true #else #define DMASGLIST_ENAB FALSE #endif /* BCMDMASGLISTOSL */ @@ -766,10 +766,10 @@ static bool _dma_descriptor_align(dma_info_t *di) return FALSE; } } - return TRUE; + return true; } -/* return TRUE if this dma engine supports DmaExtendedAddrChanges, otherwise FALSE */ +/* return true if this dma engine supports DmaExtendedAddrChanges, otherwise FALSE */ static bool _dma_isaddrext(dma_info_t *di) { if (DMA64_ENAB(di) && DMA64_MODE(di)) { @@ -781,13 +781,13 @@ static bool _dma_isaddrext(dma_info_t *di) DMA_ERROR(("%s: _dma_isaddrext: DMA64 tx doesn't have AE set\n", di->name)); ASSERT(0); } - return TRUE; + return true; } else if (di->d64rxregs != NULL) { if (!_dma64_addrext(di->osh, di->d64rxregs)) { DMA_ERROR(("%s: _dma_isaddrext: DMA64 rx doesn't have AE set\n", di->name)); ASSERT(0); } - return TRUE; + return true; } return FALSE; } else if (DMA32_ENAB(di)) { @@ -1104,12 +1104,12 @@ static bool BCMFASTPATH _dma_rxfill(dma_info_t *di) if (DMA64_ENAB(di) && DMA64_MODE(di)) { if (dma64_rxidle(di)) { DMA_ERROR(("%s: rxfill64: ring is empty !\n", di->name)); - ring_empty = TRUE; + ring_empty = true; } } else if (DMA32_ENAB(di)) { if (dma32_rxidle(di)) { DMA_ERROR(("%s: rxfill32: ring is empty !\n", di->name)); - ring_empty = TRUE; + ring_empty = true; } } else ASSERT(0); @@ -1237,7 +1237,7 @@ static void _dma_rxreclaim(dma_info_t *di) DMA_TRACE(("%s: dma_rxreclaim\n", di->name)); - while ((p = _dma_getnextrxp(di, TRUE))) + while ((p = _dma_getnextrxp(di, true))) PKTFREE(di->osh, p, FALSE); } @@ -1501,7 +1501,7 @@ static void dma32_txreclaim(dma_info_t *di, txd_range_t range) return; while ((p = dma32_getnexttxp(di, range))) - PKTFREE(di->osh, p, TRUE); + PKTFREE(di->osh, p, true); } static bool dma32_txstopped(dma_info_t *di) @@ -1576,7 +1576,7 @@ static bool dma32_alloc(dma_info_t *di, uint direction) ASSERT(IS_ALIGNED((uintptr) di->rxd32, align)); } - return TRUE; + return true; } static bool dma32_txreset(dma_info_t *di) @@ -1584,7 +1584,7 @@ static bool dma32_txreset(dma_info_t *di) u32 status; if (di->ntxd == 0) - return TRUE; + return true; /* suspend tx DMA first */ W_REG(di->osh, &di->d32txregs->control, XC_SE); @@ -1609,7 +1609,7 @@ static bool dma32_rxidle(dma_info_t *di) DMA_TRACE(("%s: dma_rxidle\n", di->name)); if (di->nrxd == 0) - return TRUE; + return true; return ((R_REG(di->osh, &di->d32rxregs->status) & RS_CD_MASK) == R_REG(di->osh, &di->d32rxregs->ptr)); @@ -1620,7 +1620,7 @@ static bool dma32_rxreset(dma_info_t *di) u32 status; if (di->nrxd == 0) - return TRUE; + return true; W_REG(di->osh, &di->d32rxregs->control, 0); SPINWAIT(((status = (R_REG(di->osh, @@ -1641,7 +1641,7 @@ static bool dma32_rxenabled(dma_info_t *di) static bool dma32_txsuspendedidle(dma_info_t *di) { if (di->ntxd == 0) - return TRUE; + return true; if (!(R_REG(di->osh, &di->d32txregs->control) & XC_SE)) return 0; @@ -1771,7 +1771,7 @@ static int dma32_txfast(dma_info_t *di, void *p0, bool commit) outoftxd: DMA_ERROR(("%s: dma_txfast: out of txds\n", di->name)); - PKTFREE(di->osh, p0, TRUE); + PKTFREE(di->osh, p0, true); di->hnddma.txavail = 0; di->hnddma.txnobuf++; return -1; @@ -2070,7 +2070,7 @@ static void BCMFASTPATH dma64_txreclaim(dma_info_t *di, txd_range_t range) while ((p = dma64_getnexttxp(di, range))) { /* For unframed data, we don't have any packets to free */ if (!(di->hnddma.dmactrlflags & DMA_CTRL_UNFRAMED)) - PKTFREE(di->osh, p, TRUE); + PKTFREE(di->osh, p, true); } } @@ -2139,7 +2139,7 @@ static bool dma64_alloc(dma_info_t *di, uint direction) ASSERT(IS_ALIGNED((uintptr) di->rxd64, align)); } - return TRUE; + return true; } static bool dma64_txreset(dma_info_t *di) @@ -2147,7 +2147,7 @@ static bool dma64_txreset(dma_info_t *di) u32 status; if (di->ntxd == 0) - return TRUE; + return true; /* suspend tx DMA first */ W_REG(di->osh, &di->d64txregs->control, D64_XC_SE); @@ -2172,7 +2172,7 @@ static bool dma64_rxidle(dma_info_t *di) DMA_TRACE(("%s: dma_rxidle\n", di->name)); if (di->nrxd == 0) - return TRUE; + return true; return ((R_REG(di->osh, &di->d64rxregs->status0) & D64_RS0_CD_MASK) == (R_REG(di->osh, &di->d64rxregs->ptr) & D64_RS0_CD_MASK)); @@ -2183,7 +2183,7 @@ static bool dma64_rxreset(dma_info_t *di) u32 status; if (di->nrxd == 0) - return TRUE; + return true; W_REG(di->osh, &di->d64rxregs->control, 0); SPINWAIT(((status = @@ -2205,7 +2205,7 @@ static bool dma64_txsuspendedidle(dma_info_t *di) { if (di->ntxd == 0) - return TRUE; + return true; if (!(R_REG(di->osh, &di->d64txregs->control) & D64_XC_SE)) return 0; @@ -2419,7 +2419,7 @@ static int BCMFASTPATH dma64_txfast(dma_info_t *di, void *p0, bool commit) outoftxd: DMA_ERROR(("%s: dma_txfast: out of txds !!!\n", di->name)); - PKTFREE(di->osh, p0, TRUE); + PKTFREE(di->osh, p0, true); di->hnddma.txavail = 0; di->hnddma.txnobuf++; return -1; @@ -2679,7 +2679,7 @@ uint dma_addrwidth(si_t *sih, void *dmaregs) (sih->buscoretype == PCIE_CORE_ID))) return DMADDRWIDTH_64; - /* DMA64 is always 32-bit capable, AE is always TRUE */ + /* DMA64 is always 32-bit capable, AE is always true */ ASSERT(_dma64_addrext(osh, (dma64regs_t *) dmaregs)); return DMADDRWIDTH_32; diff --git a/drivers/staging/brcm80211/util/hndpmu.c b/drivers/staging/brcm80211/util/hndpmu.c index 8eec20e..cd71b74 100644 --- a/drivers/staging/brcm80211/util/hndpmu.c +++ b/drivers/staging/brcm80211/util/hndpmu.c @@ -299,7 +299,7 @@ typedef struct { u32 res_mask; /* resources (chip specific) */ s8 action; /* action */ u32 depend_mask; /* changes to the dependancies mask */ - bool(*filter) (si_t *sih); /* action is taken when filter is NULL or return TRUE */ + bool(*filter) (si_t *sih); /* action is taken when filter is NULL or return true */ } pmu_res_depend_t; /* Resource dependancies mask change action */ @@ -562,26 +562,26 @@ static const pmu_res_depend_t bcm4330a0_res_depend[] = { PMURES_BIT(RES4330_HT_AVAIL), RES_DEPEND_ADD, 0, NULL} }; -/* TRUE if the power topology uses the buck boost to provide 3.3V to VDDIO_RF and WLAN PA */ +/* true if the power topology uses the buck boost to provide 3.3V to VDDIO_RF and WLAN PA */ static bool si_pmu_res_depfltr_bb(si_t *sih) { return (sih->boardflags & BFL_BUCKBOOST) != 0; } -/* TRUE if the power topology doesn't use the cbuck. Key on chiprev also if the chip is BCM4325. */ +/* true if the power topology doesn't use the cbuck. Key on chiprev also if the chip is BCM4325. */ static bool si_pmu_res_depfltr_ncb(si_t *sih) { return (sih->boardflags & BFL_NOCBUCK) != 0; } -/* TRUE if the power topology uses the PALDO */ +/* true if the power topology uses the PALDO */ static bool si_pmu_res_depfltr_paldo(si_t *sih) { return (sih->boardflags & BFL_PALDO) != 0; } -/* TRUE if the power topology doesn't use the PALDO */ +/* true if the power topology doesn't use the PALDO */ static bool si_pmu_res_depfltr_npaldo(si_t *sih) { return (sih->boardflags & BFL_PALDO) == 0; @@ -2025,7 +2025,7 @@ si_pmu_res_uptime(si_t *sih, osl_t *osh, chipcregs_t *cc, for (i = 0; i <= PMURES_MAX_RESNUM; i++) { if (!(deps & PMURES_BIT(i))) continue; - deps &= ~si_pmu_res_deps(sih, osh, cc, PMURES_BIT(i), TRUE); + deps &= ~si_pmu_res_deps(sih, osh, cc, PMURES_BIT(i), true); } si_pmu_res_masks(sih, &min_mask, &max_mask); deps &= ~min_mask; @@ -2063,7 +2063,7 @@ si_pmu_res_deps(si_t *sih, osl_t *osh, chipcregs_t *cc, u32 rsrcs, return !all ? deps : (deps ? (deps | si_pmu_res_deps(sih, osh, cc, deps, - TRUE)) : 0); + true)) : 0); } /* power up/down OTP through PMU resources */ @@ -2107,7 +2107,7 @@ void si_pmu_otp_power(si_t *sih, osl_t *osh, bool on) u32 otps; /* Figure out the dependancies (exclude min_res_mask) */ - u32 deps = si_pmu_res_deps(sih, osh, cc, rsrcs, TRUE); + u32 deps = si_pmu_res_deps(sih, osh, cc, rsrcs, true); u32 min_mask = 0, max_mask = 0; si_pmu_res_masks(sih, &min_mask, &max_mask); deps &= ~min_mask; @@ -2491,10 +2491,10 @@ bool si_pmu_is_otp_powered(si_t *sih, osl_t *osh) case BCM43236_CHIP_ID: case BCM43235_CHIP_ID: case BCM43238_CHIP_ID: - st = TRUE; + st = true; break; default: - st = TRUE; + st = true; break; } diff --git a/drivers/staging/brcm80211/util/linux_osl.c b/drivers/staging/brcm80211/util/linux_osl.c index 2c057bc..a139232 100644 --- a/drivers/staging/brcm80211/util/linux_osl.c +++ b/drivers/staging/brcm80211/util/linux_osl.c @@ -160,7 +160,7 @@ osl_t *osl_attach(void *pdev, uint bustype, bool pkttag) case PCI_BUS: case SI_BUS: case PCMCIA_BUS: - osh->pub.mmbus = TRUE; + osh->pub.mmbus = true; break; case JTAG_BUS: case SDIO_BUS: diff --git a/drivers/staging/brcm80211/util/nicpci.c b/drivers/staging/brcm80211/util/nicpci.c index ffb8ced..6a9d9d6 100644 --- a/drivers/staging/brcm80211/util/nicpci.c +++ b/drivers/staging/brcm80211/util/nicpci.c @@ -290,7 +290,7 @@ static bool pcie_mdiosetblock(pcicore_info_t *pi, uint blk) return FALSE; } - return TRUE; + return true; } static int @@ -363,7 +363,7 @@ pcie_mdioread(pcicore_info_t *pi, uint physmedia, uint regaddr, uint *regval) static int pcie_mdiowrite(pcicore_info_t *pi, uint physmedia, uint regaddr, uint val) { - return pcie_mdioop(pi, physmedia, regaddr, TRUE, &val); + return pcie_mdioop(pi, physmedia, regaddr, true, &val); } /* ***** Support functions ***** */ @@ -519,7 +519,7 @@ static void pcie_war_aspm_clkreq(pcicore_info_t *pi) if (pi->pcie_war_aspm_ovr != PCIE_ASPM_DISAB) { val16 |= SRSH_CLKREQ_ENB; - pi->pcie_pr42767 = TRUE; + pi->pcie_pr42767 = true; } else val16 &= ~SRSH_CLKREQ_ENB; @@ -684,7 +684,7 @@ void pcicore_up(void *pch, int state) return; /* Restore L1 timer for better performance */ - pcie_extendL1timer(pi, TRUE); + pcie_extendL1timer(pi, true); pcie_clkreq_upd(pi, state); } @@ -739,7 +739,7 @@ bool pcicore_pmecap_fast(osl_t *osh) return (pmecap & PME_CAP_PM_STATES) != 0; } -/* return TRUE if PM capability exists in the pci config space +/* return true if PM capability exists in the pci config space * Uses and caches the information using core handle */ static bool pcicore_pmecap(pcicore_info_t *pi) @@ -786,7 +786,7 @@ void pcicore_pmeen(void *pch) } /* - * Return TRUE if PME status set + * Return true if PME status set */ bool pcicore_pmestat(void *pch) { diff --git a/drivers/staging/brcm80211/util/sbutils.c b/drivers/staging/brcm80211/util/sbutils.c index 4a9b1c5..06a1437 100644 --- a/drivers/staging/brcm80211/util/sbutils.c +++ b/drivers/staging/brcm80211/util/sbutils.c @@ -445,7 +445,7 @@ bool sb_taclear(si_t *sih, bool details) } if (inband | timeout | serror) { - rc = TRUE; + rc = true; SI_ERROR(("sb_taclear: inband 0x%x, serror 0x%x, timeout " "0x%x!\n", inband, serror, timeout)); } diff --git a/drivers/staging/brcm80211/util/siutils.c b/drivers/staging/brcm80211/util/siutils.c index 42874e9..5b945f2 100644 --- a/drivers/staging/brcm80211/util/siutils.c +++ b/drivers/staging/brcm80211/util/siutils.c @@ -162,7 +162,7 @@ static bool si_buscore_prep(si_info_t *sii, uint bustype, uint devid, } #endif /* defined(BCMSDIO) */ - return TRUE; + return true; } static bool si_buscore_setup(si_info_t *sii, chipcregs_t *cc, uint bustype, @@ -226,11 +226,11 @@ static bool si_buscore_setup(si_info_t *sii, chipcregs_t *cc, uint bustype, if (cid == PCI_CORE_ID) { pciidx = i; pcirev = crev; - pci = TRUE; + pci = true; } else if (cid == PCIE_CORE_ID) { pcieidx = i; pcierev = crev; - pcie = TRUE; + pcie = true; } } #ifdef BCMSDIO @@ -302,7 +302,7 @@ static bool si_buscore_setup(si_info_t *sii, chipcregs_t *cc, uint bustype, /* return to the original core */ si_setcoreidx(&sii->pub, *origidx); - return TRUE; + return true; } static __used void si_nvram_process(si_info_t *sii, char *pvars) @@ -681,7 +681,7 @@ static si_info_t *si_doattach(si_info_t *sii, uint devid, osl_t *osh, if (CHIPID(sih->chip) == BCM4331_CHIP_ID) { /* Enable Ext PA lines depending on chip package option */ - si_chipcontrl_epa4331(sih, TRUE); + si_chipcontrl_epa4331(sih, true); } return sii; @@ -1164,7 +1164,7 @@ static void si_clkctl_setdelay(si_info_t *sii, void *chipcregs) /* Starting with 4318 it is ILP that is used for the delays */ slowmaxfreq = - si_slowclk_freq(sii, (sii->pub.ccrev >= 10) ? FALSE : TRUE, cc); + si_slowclk_freq(sii, (sii->pub.ccrev >= 10) ? FALSE : true, cc); pll_on_delay = ((slowmaxfreq * pll_delay) + 999999) / 1000000; fref_sel_delay = ((slowmaxfreq * FREF_DELAY) + 999999) / 1000000; @@ -1547,7 +1547,7 @@ static char *si_devpathvar(si_t *sih, char *var, int len, const char *name) return var; } -/* return TRUE if PCIE capability exists in the pci config space */ +/* return true if PCIE capability exists in the pci config space */ static __used bool si_ispcie(si_info_t *sii) { u8 cap_ptr; @@ -1561,7 +1561,7 @@ static __used bool si_ispcie(si_info_t *sii) if (!cap_ptr) return FALSE; - return TRUE; + return true; } #ifdef BCMSDIO @@ -1937,7 +1937,7 @@ bool si_deviceremoved(si_t *sih) ASSERT(sii->osh != NULL); w = OSL_PCI_READ_CONFIG(sii->osh, PCI_CFG_VID, sizeof(u32)); if ((w & 0xFFFF) != VENDOR_BROADCOM) - return TRUE; + return true; break; } return FALSE; @@ -1976,7 +1976,7 @@ bool si_is_sprom_available(si_t *sih) case BCM4331_CHIP_ID: return (sih->chipst & CST4331_SPROM_PRESENT) != 0; default: - return TRUE; + return true; } } @@ -2012,7 +2012,7 @@ bool si_is_otp_powered(si_t *sih) { if (PMUCTL_ENAB(sih)) return si_pmu_is_otp_powered(sih, si_osh(sih)); - return TRUE; + return true; } void si_otp_power(si_t *sih, bool on) |