staging: brcm80211: fix 'ERROR: "foo * bar" should be "foo *bar"'

Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>

1 files changed, 162 insertions, 162 deletions

diff --git a/drivers/staging/brcm80211/sys/wlc_bmac.c b/drivers/staging/brcm80211/sys/wlc_bmac.c
index 70aa98b..b965c1e 100644
--- a/drivers/staging/brcm80211/sys/wlc_bmac.c
+++ b/drivers/staging/brcm80211/sys/wlc_bmac.c
@@ -112,64 +112,64 @@ static uint16 xmtfifo_sz[][NFIFO] = {
 	{9, 58, 22, 14, 14, 5},	/* corerev 24: 2304, 14848, 5632, 3584, 3584, 1280 */
 };
 
-static void wlc_clkctl_clk(wlc_hw_info_t * wlc, uint mode);
-static void wlc_coreinit(wlc_info_t * wlc);
+static void wlc_clkctl_clk(wlc_hw_info_t *wlc, uint mode);
+static void wlc_coreinit(wlc_info_t *wlc);
 
 /* used by wlc_wakeucode_init() */
-static void wlc_write_inits(wlc_hw_info_t * wlc_hw, const d11init_t * inits);
-static void wlc_ucode_write(wlc_hw_info_t * wlc_hw, const uint32 ucode[],
+static void wlc_write_inits(wlc_hw_info_t *wlc_hw, const d11init_t *inits);
+static void wlc_ucode_write(wlc_hw_info_t *wlc_hw, const uint32 ucode[],
 			    const uint nbytes);
-static void wlc_ucode_download(wlc_hw_info_t * wlc);
-static void wlc_ucode_txant_set(wlc_hw_info_t * wlc_hw);
+static void wlc_ucode_download(wlc_hw_info_t *wlc);
+static void wlc_ucode_txant_set(wlc_hw_info_t *wlc_hw);
 
 /* used by wlc_dpc() */
-static bool wlc_bmac_dotxstatus(wlc_hw_info_t * wlc, tx_status_t * txs,
+static bool wlc_bmac_dotxstatus(wlc_hw_info_t *wlc, tx_status_t *txs,
 				uint32 s2);
-static bool wlc_bmac_txstatus_corerev4(wlc_hw_info_t * wlc);
-static bool wlc_bmac_txstatus(wlc_hw_info_t * wlc, bool bound, bool * fatal);
-static bool wlc_bmac_recv(wlc_hw_info_t * wlc_hw, uint fifo, bool bound);
+static bool wlc_bmac_txstatus_corerev4(wlc_hw_info_t *wlc);
+static bool wlc_bmac_txstatus(wlc_hw_info_t *wlc, bool bound, bool *fatal);
+static bool wlc_bmac_recv(wlc_hw_info_t *wlc_hw, uint fifo, bool bound);
 
 /* used by wlc_down() */
-static void wlc_flushqueues(wlc_info_t * wlc);
+static void wlc_flushqueues(wlc_info_t *wlc);
 
-static void wlc_write_mhf(wlc_hw_info_t * wlc_hw, uint16 * mhfs);
-static void wlc_mctrl_reset(wlc_hw_info_t * wlc_hw);
-static void wlc_corerev_fifofixup(wlc_hw_info_t * wlc_hw);
+static void wlc_write_mhf(wlc_hw_info_t *wlc_hw, uint16 *mhfs);
+static void wlc_mctrl_reset(wlc_hw_info_t *wlc_hw);
+static void wlc_corerev_fifofixup(wlc_hw_info_t *wlc_hw);
 
 /* Low Level Prototypes */
-static uint16 wlc_bmac_read_objmem(wlc_hw_info_t * wlc_hw, uint offset,
+static uint16 wlc_bmac_read_objmem(wlc_hw_info_t *wlc_hw, uint offset,
 				   uint32 sel);
-static void wlc_bmac_write_objmem(wlc_hw_info_t * wlc_hw, uint offset, uint16 v,
+static void wlc_bmac_write_objmem(wlc_hw_info_t *wlc_hw, uint offset, uint16 v,
 				  uint32 sel);
-static bool wlc_bmac_attach_dmapio(wlc_info_t * wlc, uint j, bool wme);
-static void wlc_bmac_detach_dmapio(wlc_hw_info_t * wlc_hw);
-static void wlc_ucode_bsinit(wlc_hw_info_t * wlc_hw);
-static bool wlc_validboardtype(wlc_hw_info_t * wlc);
-static bool wlc_isgoodchip(wlc_hw_info_t * wlc_hw);
-static char *wlc_get_macaddr(wlc_hw_info_t * wlc_hw);
-static void wlc_mhfdef(wlc_info_t * wlc, uint16 * mhfs, uint16 mhf2_init);
-static void wlc_mctrl_write(wlc_hw_info_t * wlc_hw);
-static void wlc_ucode_mute_override_set(wlc_hw_info_t * wlc_hw);
-static void wlc_ucode_mute_override_clear(wlc_hw_info_t * wlc_hw);
-static uint32 wlc_wlintrsoff(wlc_info_t * wlc);
-static void wlc_wlintrsrestore(wlc_info_t * wlc, uint32 macintmask);
-static void wlc_gpio_init(wlc_info_t * wlc);
-static void wlc_write_hw_bcntemplate0(wlc_hw_info_t * wlc_hw, void *bcn,
+static bool wlc_bmac_attach_dmapio(wlc_info_t *wlc, uint j, bool wme);
+static void wlc_bmac_detach_dmapio(wlc_hw_info_t *wlc_hw);
+static void wlc_ucode_bsinit(wlc_hw_info_t *wlc_hw);
+static bool wlc_validboardtype(wlc_hw_info_t *wlc);
+static bool wlc_isgoodchip(wlc_hw_info_t *wlc_hw);
+static char *wlc_get_macaddr(wlc_hw_info_t *wlc_hw);
+static void wlc_mhfdef(wlc_info_t *wlc, uint16 *mhfs, uint16 mhf2_init);
+static void wlc_mctrl_write(wlc_hw_info_t *wlc_hw);
+static void wlc_ucode_mute_override_set(wlc_hw_info_t *wlc_hw);
+static void wlc_ucode_mute_override_clear(wlc_hw_info_t *wlc_hw);
+static uint32 wlc_wlintrsoff(wlc_info_t *wlc);
+static void wlc_wlintrsrestore(wlc_info_t *wlc, uint32 macintmask);
+static void wlc_gpio_init(wlc_info_t *wlc);
+static void wlc_write_hw_bcntemplate0(wlc_hw_info_t *wlc_hw, void *bcn,
 				      int len);
-static void wlc_write_hw_bcntemplate1(wlc_hw_info_t * wlc_hw, void *bcn,
+static void wlc_write_hw_bcntemplate1(wlc_hw_info_t *wlc_hw, void *bcn,
 				      int len);
-static void wlc_bmac_bsinit(wlc_info_t * wlc, chanspec_t chanspec);
-static uint32 wlc_setband_inact(wlc_info_t * wlc, uint bandunit);
-static void wlc_bmac_setband(wlc_hw_info_t * wlc_hw, uint bandunit,
+static void wlc_bmac_bsinit(wlc_info_t *wlc, chanspec_t chanspec);
+static uint32 wlc_setband_inact(wlc_info_t *wlc, uint bandunit);
+static void wlc_bmac_setband(wlc_hw_info_t *wlc_hw, uint bandunit,
 			     chanspec_t chanspec);
-static void wlc_bmac_update_slot_timing(wlc_hw_info_t * wlc_hw, bool shortslot);
-static void wlc_upd_ofdm_pctl1_table(wlc_hw_info_t * wlc_hw);
-static uint16 wlc_bmac_ofdm_ratetable_offset(wlc_hw_info_t * wlc_hw,
+static void wlc_bmac_update_slot_timing(wlc_hw_info_t *wlc_hw, bool shortslot);
+static void wlc_upd_ofdm_pctl1_table(wlc_hw_info_t *wlc_hw);
+static uint16 wlc_bmac_ofdm_ratetable_offset(wlc_hw_info_t *wlc_hw,
 					     uint8 rate);
 
 /* === Low Level functions === */
 
-void wlc_bmac_set_shortslot(wlc_hw_info_t * wlc_hw, bool shortslot)
+void wlc_bmac_set_shortslot(wlc_hw_info_t *wlc_hw, bool shortslot)
 {
 	wlc_hw->shortslot = shortslot;
 
@@ -185,7 +185,7 @@ void wlc_bmac_set_shortslot(wlc_hw_info_t * wlc_hw, bool shortslot)
  * or shortslot 11g (9us slots)
  * The PSM needs to be suspended for this call.
  */
-static void wlc_bmac_update_slot_timing(wlc_hw_info_t * wlc_hw, bool shortslot)
+static void wlc_bmac_update_slot_timing(wlc_hw_info_t *wlc_hw, bool shortslot)
 {
 	osl_t *osh;
 	d11regs_t *regs;
@@ -204,7 +204,7 @@ static void wlc_bmac_update_slot_timing(wlc_hw_info_t * wlc_hw, bool shortslot)
 	}
 }
 
-static void WLBANDINITFN(wlc_ucode_bsinit) (wlc_hw_info_t * wlc_hw) {
+static void WLBANDINITFN(wlc_ucode_bsinit) (wlc_hw_info_t *wlc_hw) {
 	/* init microcode host flags */
 	wlc_write_mhf(wlc_hw, wlc_hw->band->mhfs);
 
@@ -230,7 +230,7 @@ static void WLBANDINITFN(wlc_ucode_bsinit) (wlc_hw_info_t * wlc_hw) {
 }
 
 /* switch to new band but leave it inactive */
-static uint32 WLBANDINITFN(wlc_setband_inact) (wlc_info_t * wlc, uint bandunit) {
+static uint32 WLBANDINITFN(wlc_setband_inact) (wlc_info_t *wlc, uint bandunit) {
 	wlc_hw_info_t *wlc_hw = wlc->hw;
 	uint32 macintmask;
 	uint32 tmp;
@@ -266,7 +266,7 @@ static uint32 WLBANDINITFN(wlc_setband_inact) (wlc_info_t * wlc, uint bandunit)
  * Param 'bound' indicates max. # frames to process before break out.
  */
 static bool BCMFASTPATH
-wlc_bmac_recv(wlc_hw_info_t * wlc_hw, uint fifo, bool bound)
+wlc_bmac_recv(wlc_hw_info_t *wlc_hw, uint fifo, bool bound)
 {
 	void *p;
 	void *head = NULL;
@@ -320,7 +320,7 @@ wlc_bmac_recv(wlc_hw_info_t * wlc_hw, uint fifo, bool bound)
  *   Return TRUE if another dpc needs to be re-scheduled. FALSE otherwise.
  *   Param 'bounded' indicates if applicable loops should be bounded.
  */
-bool BCMFASTPATH wlc_dpc(wlc_info_t * wlc, bool bounded)
+bool BCMFASTPATH wlc_dpc(wlc_info_t *wlc, bool bounded)
 {
 	uint32 macintstatus;
 	wlc_hw_info_t *wlc_hw = wlc->hw;
@@ -473,7 +473,7 @@ void wlc_bmac_watchdog(void *arg)
 }
 
 void
-wlc_bmac_set_chanspec(wlc_hw_info_t * wlc_hw, chanspec_t chanspec, bool mute,
+wlc_bmac_set_chanspec(wlc_hw_info_t *wlc_hw, chanspec_t chanspec, bool mute,
 		      struct txpwr_limits *txpwr)
 {
 	uint bandunit;
@@ -517,7 +517,7 @@ wlc_bmac_set_chanspec(wlc_hw_info_t * wlc_hw, chanspec_t chanspec, bool mute,
 	}
 }
 
-int wlc_bmac_revinfo_get(wlc_hw_info_t * wlc_hw, wlc_bmac_revinfo_t * revinfo)
+int wlc_bmac_revinfo_get(wlc_hw_info_t *wlc_hw, wlc_bmac_revinfo_t *revinfo)
 {
 	si_t *sih = wlc_hw->sih;
 	uint idx;
@@ -555,7 +555,7 @@ int wlc_bmac_revinfo_get(wlc_hw_info_t * wlc_hw, wlc_bmac_revinfo_t * revinfo)
 	return 0;
 }
 
-int wlc_bmac_state_get(wlc_hw_info_t * wlc_hw, wlc_bmac_state_t * state)
+int wlc_bmac_state_get(wlc_hw_info_t *wlc_hw, wlc_bmac_state_t *state)
 {
 	state->machwcap = wlc_hw->machwcap;
 
@@ -563,7 +563,7 @@ int wlc_bmac_state_get(wlc_hw_info_t * wlc_hw, wlc_bmac_state_t * state)
 }
 
 static bool
-BCMATTACHFN(wlc_bmac_attach_dmapio) (wlc_info_t * wlc, uint j, bool wme) {
+BCMATTACHFN(wlc_bmac_attach_dmapio) (wlc_info_t *wlc, uint j, bool wme) {
 	uint i;
 	char name[8];
 	/* ucode host flag 2 needed for pio mode, independent of band and fifo */
@@ -681,7 +681,7 @@ BCMATTACHFN(wlc_bmac_attach_dmapio) (wlc_info_t * wlc, uint j, bool wme) {
 	return TRUE;
 }
 
-static void BCMATTACHFN(wlc_bmac_detach_dmapio) (wlc_hw_info_t * wlc_hw) {
+static void BCMATTACHFN(wlc_bmac_detach_dmapio) (wlc_hw_info_t *wlc_hw) {
 	uint j;
 
 	for (j = 0; j < NFIFO; j++) {
@@ -700,8 +700,8 @@ static void BCMATTACHFN(wlc_bmac_detach_dmapio) (wlc_hw_info_t * wlc_hw) {
  */
 
 int
-BCMATTACHFN(wlc_bmac_attach) (wlc_info_t * wlc, uint16 vendor, uint16 device,
-			      uint unit, bool piomode, osl_t * osh,
+BCMATTACHFN(wlc_bmac_attach) (wlc_info_t *wlc, uint16 vendor, uint16 device,
+			      uint unit, bool piomode, osl_t *osh,
 			      void *regsva, uint bustype, void *btparam) {
 	wlc_hw_info_t *wlc_hw;
 	d11regs_t *regs;
@@ -1039,7 +1039,7 @@ BCMATTACHFN(wlc_bmac_attach) (wlc_info_t * wlc, uint16 vendor, uint16 device,
  * may get overrides later in this function
  *  BMAC_NOTES, move low out and resolve the dangling ones
  */
-void BCMATTACHFN(wlc_bmac_info_init) (wlc_hw_info_t * wlc_hw) {
+void BCMATTACHFN(wlc_bmac_info_init) (wlc_hw_info_t *wlc_hw) {
 	wlc_info_t *wlc = wlc_hw->wlc;
 
 	/* set default sw macintmask value */
@@ -1060,7 +1060,7 @@ void BCMATTACHFN(wlc_bmac_info_init) (wlc_hw_info_t * wlc_hw) {
 /*
  * low level detach
  */
-int BCMATTACHFN(wlc_bmac_detach) (wlc_info_t * wlc) {
+int BCMATTACHFN(wlc_bmac_detach) (wlc_info_t *wlc) {
 	uint i;
 	wlc_hwband_t *band;
 	wlc_hw_info_t *wlc_hw = wlc->hw;
@@ -1110,7 +1110,7 @@ int BCMATTACHFN(wlc_bmac_detach) (wlc_info_t * wlc) {
 
 }
 
-void BCMINITFN(wlc_bmac_reset) (wlc_hw_info_t * wlc_hw) {
+void BCMINITFN(wlc_bmac_reset) (wlc_hw_info_t *wlc_hw) {
 	WL_TRACE(("wl%d: wlc_bmac_reset\n", wlc_hw->unit));
 
 	WLCNTINCR(wlc_hw->wlc->pub->_cnt->reset);
@@ -1126,7 +1126,7 @@ void BCMINITFN(wlc_bmac_reset) (wlc_hw_info_t * wlc_hw) {
 }
 
 void
-BCMINITFN(wlc_bmac_init) (wlc_hw_info_t * wlc_hw, chanspec_t chanspec,
+BCMINITFN(wlc_bmac_init) (wlc_hw_info_t *wlc_hw, chanspec_t chanspec,
 			  bool mute) {
 	uint32 macintmask;
 	bool fastclk;
@@ -1176,7 +1176,7 @@ BCMINITFN(wlc_bmac_init) (wlc_hw_info_t * wlc_hw, chanspec_t chanspec,
 		wlc_clkctl_clk(wlc_hw, CLK_DYNAMIC);
 }
 
-int BCMINITFN(wlc_bmac_up_prep) (wlc_hw_info_t * wlc_hw) {
+int BCMINITFN(wlc_bmac_up_prep) (wlc_hw_info_t *wlc_hw) {
 	uint coremask;
 
 	WL_TRACE(("wl%d: %s:\n", wlc_hw->unit, __func__));
@@ -1223,7 +1223,7 @@ int BCMINITFN(wlc_bmac_up_prep) (wlc_hw_info_t * wlc_hw) {
 	return 0;
 }
 
-int BCMINITFN(wlc_bmac_up_finish) (wlc_hw_info_t * wlc_hw) {
+int BCMINITFN(wlc_bmac_up_finish) (wlc_hw_info_t *wlc_hw) {
 	WL_TRACE(("wl%d: %s:\n", wlc_hw->unit, __func__));
 
 	wlc_hw->up = TRUE;
@@ -1236,7 +1236,7 @@ int BCMINITFN(wlc_bmac_up_finish) (wlc_hw_info_t * wlc_hw) {
 	return 0;
 }
 
-int BCMUNINITFN(wlc_bmac_down_prep) (wlc_hw_info_t * wlc_hw) {
+int BCMUNINITFN(wlc_bmac_down_prep) (wlc_hw_info_t *wlc_hw) {
 	bool dev_gone;
 	uint callbacks = 0;
 
@@ -1263,7 +1263,7 @@ int BCMUNINITFN(wlc_bmac_down_prep) (wlc_hw_info_t * wlc_hw) {
 	return callbacks;
 }
 
-int BCMUNINITFN(wlc_bmac_down_finish) (wlc_hw_info_t * wlc_hw) {
+int BCMUNINITFN(wlc_bmac_down_finish) (wlc_hw_info_t *wlc_hw) {
 	uint callbacks = 0;
 	bool dev_gone;
 
@@ -1306,7 +1306,7 @@ int BCMUNINITFN(wlc_bmac_down_finish) (wlc_hw_info_t * wlc_hw) {
 	return callbacks;
 }
 
-void wlc_bmac_wait_for_wake(wlc_hw_info_t * wlc_hw)
+void wlc_bmac_wait_for_wake(wlc_hw_info_t *wlc_hw)
 {
 	if (D11REV_IS(wlc_hw->corerev, 4))	/* no slowclock */
 		OSL_DELAY(5);
@@ -1322,29 +1322,29 @@ void wlc_bmac_wait_for_wake(wlc_hw_info_t * wlc_hw)
 	ASSERT(wlc_bmac_read_shm(wlc_hw, M_UCODE_DBGST) != DBGST_ASLEEP);
 }
 
-void wlc_bmac_hw_etheraddr(wlc_hw_info_t * wlc_hw, struct ether_addr *ea)
+void wlc_bmac_hw_etheraddr(wlc_hw_info_t *wlc_hw, struct ether_addr *ea)
 {
 	bcopy(&wlc_hw->etheraddr, ea, ETHER_ADDR_LEN);
 }
 
-void wlc_bmac_set_hw_etheraddr(wlc_hw_info_t * wlc_hw, struct ether_addr *ea)
+void wlc_bmac_set_hw_etheraddr(wlc_hw_info_t *wlc_hw, struct ether_addr *ea)
 {
 	bcopy(ea, &wlc_hw->etheraddr, ETHER_ADDR_LEN);
 }
 
-int wlc_bmac_bandtype(wlc_hw_info_t * wlc_hw)
+int wlc_bmac_bandtype(wlc_hw_info_t *wlc_hw)
 {
 	return (wlc_hw->band->bandtype);
 }
 
-void *wlc_cur_phy(wlc_info_t * wlc)
+void *wlc_cur_phy(wlc_info_t *wlc)
 {
 	wlc_hw_info_t *wlc_hw = wlc->hw;
 	return ((void *)wlc_hw->band->pi);
 }
 
 /* control chip clock to save power, enable dynamic clock or force fast clock */
-static void wlc_clkctl_clk(wlc_hw_info_t * wlc_hw, uint mode)
+static void wlc_clkctl_clk(wlc_hw_info_t *wlc_hw, uint mode)
 {
 	if (PMUCTL_ENAB(wlc_hw->sih)) {
 		/* new chips with PMU, CCS_FORCEHT will distribute the HT clock on backplane,
@@ -1441,7 +1441,7 @@ static void wlc_clkctl_clk(wlc_hw_info_t * wlc_hw, uint mode)
 
 /* set initial host flags value */
 static void
-BCMINITFN(wlc_mhfdef) (wlc_info_t * wlc, uint16 * mhfs, uint16 mhf2_init) {
+BCMINITFN(wlc_mhfdef) (wlc_info_t *wlc, uint16 *mhfs, uint16 mhf2_init) {
 	wlc_hw_info_t *wlc_hw = wlc->hw;
 
 	bzero(mhfs, sizeof(uint16) * MHFMAX);
@@ -1470,7 +1470,7 @@ BCMINITFN(wlc_mhfdef) (wlc_info_t * wlc, uint16 * mhfs, uint16 mhf2_init) {
  *                   WLC_BAND_ALL  <--- All bands
  */
 void
-wlc_bmac_mhf(wlc_hw_info_t * wlc_hw, uint8 idx, uint16 mask, uint16 val,
+wlc_bmac_mhf(wlc_hw_info_t *wlc_hw, uint8 idx, uint16 mask, uint16 val,
 	     int bands)
 {
 	uint16 save;
@@ -1524,7 +1524,7 @@ wlc_bmac_mhf(wlc_hw_info_t * wlc_hw, uint8 idx, uint16 mask, uint16 val,
 	}
 }
 
-uint16 wlc_bmac_mhf_get(wlc_hw_info_t * wlc_hw, uint8 idx, int bands)
+uint16 wlc_bmac_mhf_get(wlc_hw_info_t *wlc_hw, uint8 idx, int bands)
 {
 	wlc_hwband_t *band;
 	ASSERT(idx < MHFMAX);
@@ -1550,7 +1550,7 @@ uint16 wlc_bmac_mhf_get(wlc_hw_info_t * wlc_hw, uint8 idx, int bands)
 	return band->mhfs[idx];
 }
 
-static void wlc_write_mhf(wlc_hw_info_t * wlc_hw, uint16 * mhfs)
+static void wlc_write_mhf(wlc_hw_info_t *wlc_hw, uint16 *mhfs)
 {
 	uint8 idx;
 	uint16 addr[] =
@@ -1568,7 +1568,7 @@ static void wlc_write_mhf(wlc_hw_info_t * wlc_hw, uint16 * mhfs)
 /* set the maccontrol register to desired reset state and
  * initialize the sw cache of the register
  */
-static void wlc_mctrl_reset(wlc_hw_info_t * wlc_hw)
+static void wlc_mctrl_reset(wlc_hw_info_t *wlc_hw)
 {
 	/* IHR accesses are always enabled, PSM disabled, HPS off and WAKE on */
 	wlc_hw->maccontrol = 0;
@@ -1579,7 +1579,7 @@ static void wlc_mctrl_reset(wlc_hw_info_t * wlc_hw)
 }
 
 /* set or clear maccontrol bits */
-void wlc_bmac_mctrl(wlc_hw_info_t * wlc_hw, uint32 mask, uint32 val)
+void wlc_bmac_mctrl(wlc_hw_info_t *wlc_hw, uint32 mask, uint32 val)
 {
 	uint32 maccontrol;
 	uint32 new_maccontrol;
@@ -1601,7 +1601,7 @@ void wlc_bmac_mctrl(wlc_hw_info_t * wlc_hw, uint32 mask, uint32 val)
 }
 
 /* write the software state of maccontrol and overrides to the maccontrol register */
-static void wlc_mctrl_write(wlc_hw_info_t * wlc_hw)
+static void wlc_mctrl_write(wlc_hw_info_t *wlc_hw)
 {
 	uint32 maccontrol = wlc_hw->maccontrol;
 
@@ -1618,7 +1618,7 @@ static void wlc_mctrl_write(wlc_hw_info_t * wlc_hw)
 	W_REG(wlc_hw->osh, &wlc_hw->regs->maccontrol, maccontrol);
 }
 
-void wlc_ucode_wake_override_set(wlc_hw_info_t * wlc_hw, uint32 override_bit)
+void wlc_ucode_wake_override_set(wlc_hw_info_t *wlc_hw, uint32 override_bit)
 {
 	ASSERT((wlc_hw->wake_override & override_bit) == 0);
 
@@ -1635,7 +1635,7 @@ void wlc_ucode_wake_override_set(wlc_hw_info_t * wlc_hw, uint32 override_bit)
 	return;
 }
 
-void wlc_ucode_wake_override_clear(wlc_hw_info_t * wlc_hw, uint32 override_bit)
+void wlc_ucode_wake_override_clear(wlc_hw_info_t *wlc_hw, uint32 override_bit)
 {
 	ASSERT(wlc_hw->wake_override & override_bit);
 
@@ -1656,7 +1656,7 @@ void wlc_ucode_wake_override_clear(wlc_hw_info_t * wlc_hw, uint32 override_bit)
  * STA               0              1 <--- This will ensure no beacons
  * IBSS              0              0
  */
-static void wlc_ucode_mute_override_set(wlc_hw_info_t * wlc_hw)
+static void wlc_ucode_mute_override_set(wlc_hw_info_t *wlc_hw)
 {
 	wlc_hw->mute_override = 1;
 
@@ -1672,7 +1672,7 @@ static void wlc_ucode_mute_override_set(wlc_hw_info_t * wlc_hw)
 }
 
 /* Clear the override on AP and INFRA bits */
-static void wlc_ucode_mute_override_clear(wlc_hw_info_t * wlc_hw)
+static void wlc_ucode_mute_override_clear(wlc_hw_info_t *wlc_hw)
 {
 	if (wlc_hw->mute_override == 0)
 		return;
@@ -1692,7 +1692,7 @@ static void wlc_ucode_mute_override_clear(wlc_hw_info_t * wlc_hw)
  * Write a MAC address to the rcmta structure
  */
 void
-wlc_bmac_set_rcmta(wlc_hw_info_t * wlc_hw, int idx,
+wlc_bmac_set_rcmta(wlc_hw_info_t *wlc_hw, int idx,
 		   const struct ether_addr *addr)
 {
 	d11regs_t *regs = wlc_hw->regs;
@@ -1726,7 +1726,7 @@ wlc_bmac_set_rcmta(wlc_hw_info_t * wlc_hw, int idx,
  * Write a MAC address to the given match reg offset in the RXE match engine.
  */
 void
-wlc_bmac_set_addrmatch(wlc_hw_info_t * wlc_hw, int match_reg_offset,
+wlc_bmac_set_addrmatch(wlc_hw_info_t *wlc_hw, int match_reg_offset,
 		       const struct ether_addr *addr)
 {
 	d11regs_t *regs;
@@ -1755,7 +1755,7 @@ wlc_bmac_set_addrmatch(wlc_hw_info_t * wlc_hw, int match_reg_offset,
 }
 
 void
-wlc_bmac_write_template_ram(wlc_hw_info_t * wlc_hw, int offset, int len,
+wlc_bmac_write_template_ram(wlc_hw_info_t *wlc_hw, int offset, int len,
 			    void *buf)
 {
 	d11regs_t *regs;
@@ -1798,7 +1798,7 @@ wlc_bmac_write_template_ram(wlc_hw_info_t * wlc_hw, int offset, int len,
 	}
 }
 
-void wlc_bmac_set_cwmin(wlc_hw_info_t * wlc_hw, uint16 newmin)
+void wlc_bmac_set_cwmin(wlc_hw_info_t *wlc_hw, uint16 newmin)
 {
 	osl_t *osh;
 
@@ -1810,7 +1810,7 @@ void wlc_bmac_set_cwmin(wlc_hw_info_t * wlc_hw, uint16 newmin)
 	W_REG(osh, &wlc_hw->regs->objdata, newmin);
 }
 
-void wlc_bmac_set_cwmax(wlc_hw_info_t * wlc_hw, uint16 newmax)
+void wlc_bmac_set_cwmax(wlc_hw_info_t *wlc_hw, uint16 newmax)
 {
 	osl_t *osh;
 
@@ -1822,7 +1822,7 @@ void wlc_bmac_set_cwmax(wlc_hw_info_t * wlc_hw, uint16 newmax)
 	W_REG(osh, &wlc_hw->regs->objdata, newmax);
 }
 
-void wlc_bmac_bw_set(wlc_hw_info_t * wlc_hw, uint16 bw)
+void wlc_bmac_bw_set(wlc_hw_info_t *wlc_hw, uint16 bw)
 {
 	bool fastclk;
 	uint32 tmp;
@@ -1846,7 +1846,7 @@ void wlc_bmac_bw_set(wlc_hw_info_t * wlc_hw, uint16 bw)
 }
 
 static void
-wlc_write_hw_bcntemplate0(wlc_hw_info_t * wlc_hw, void *bcn, int len)
+wlc_write_hw_bcntemplate0(wlc_hw_info_t *wlc_hw, void *bcn, int len)
 {
 	d11regs_t *regs = wlc_hw->regs;
 
@@ -1860,7 +1860,7 @@ wlc_write_hw_bcntemplate0(wlc_hw_info_t * wlc_hw, void *bcn, int len)
 }
 
 static void
-wlc_write_hw_bcntemplate1(wlc_hw_info_t * wlc_hw, void *bcn, int len)
+wlc_write_hw_bcntemplate1(wlc_hw_info_t *wlc_hw, void *bcn, int len)
 {
 	d11regs_t *regs = wlc_hw->regs;
 
@@ -1875,7 +1875,7 @@ wlc_write_hw_bcntemplate1(wlc_hw_info_t * wlc_hw, void *bcn, int len)
 
 /* mac is assumed to be suspended at this point */
 void
-wlc_bmac_write_hw_bcntemplates(wlc_hw_info_t * wlc_hw, void *bcn, int len,
+wlc_bmac_write_hw_bcntemplates(wlc_hw_info_t *wlc_hw, void *bcn, int len,
 			       bool both)
 {
 	d11regs_t *regs = wlc_hw->regs;
@@ -1896,7 +1896,7 @@ wlc_bmac_write_hw_bcntemplates(wlc_hw_info_t * wlc_hw, void *bcn, int len,
 	}
 }
 
-static void WLBANDINITFN(wlc_bmac_upd_synthpu) (wlc_hw_info_t * wlc_hw) {
+static void WLBANDINITFN(wlc_bmac_upd_synthpu) (wlc_hw_info_t *wlc_hw) {
 	uint16 v;
 	wlc_info_t *wlc = wlc_hw->wlc;
 	/* update SYNTHPU_DLY */
@@ -1914,7 +1914,7 @@ static void WLBANDINITFN(wlc_bmac_upd_synthpu) (wlc_hw_info_t * wlc_hw) {
 
 /* band-specific init */
 static void
-WLBANDINITFN(wlc_bmac_bsinit) (wlc_info_t * wlc, chanspec_t chanspec) {
+WLBANDINITFN(wlc_bmac_bsinit) (wlc_info_t *wlc, chanspec_t chanspec) {
 	wlc_hw_info_t *wlc_hw = wlc->hw;
 
 	WL_TRACE(("wl%d: wlc_bmac_bsinit: bandunit %d\n", wlc_hw->unit,
@@ -1952,7 +1952,7 @@ WLBANDINITFN(wlc_bmac_bsinit) (wlc_info_t * wlc, chanspec_t chanspec) {
 	wlc_bmac_upd_synthpu(wlc_hw);
 }
 
-void wlc_bmac_core_phy_clk(wlc_hw_info_t * wlc_hw, bool clk)
+void wlc_bmac_core_phy_clk(wlc_hw_info_t *wlc_hw, bool clk)
 {
 	WL_TRACE(("wl%d: wlc_bmac_core_phy_clk: clk %d\n", wlc_hw->unit, clk));
 
@@ -1977,7 +1977,7 @@ void wlc_bmac_core_phy_clk(wlc_hw_info_t * wlc_hw, bool clk)
 }
 
 /* Perform a soft reset of the PHY PLL */
-void wlc_bmac_core_phypll_reset(wlc_hw_info_t * wlc_hw)
+void wlc_bmac_core_phypll_reset(wlc_hw_info_t *wlc_hw)
 {
 	WL_TRACE(("wl%d: wlc_bmac_core_phypll_reset\n", wlc_hw->unit));
 
@@ -1998,7 +1998,7 @@ void wlc_bmac_core_phypll_reset(wlc_hw_info_t * wlc_hw)
 /* light way to turn on phy clock without reset for NPHY only
  *  refer to wlc_bmac_core_phy_clk for full version
  */
-void wlc_bmac_phyclk_fgc(wlc_hw_info_t * wlc_hw, bool clk)
+void wlc_bmac_phyclk_fgc(wlc_hw_info_t *wlc_hw, bool clk)
 {
 	/* support(necessary for NPHY and HYPHY) only */
 	if (!WLCISNPHY(wlc_hw->band))
@@ -2011,7 +2011,7 @@ void wlc_bmac_phyclk_fgc(wlc_hw_info_t * wlc_hw, bool clk)
 
 }
 
-void wlc_bmac_macphyclk_set(wlc_hw_info_t * wlc_hw, bool clk)
+void wlc_bmac_macphyclk_set(wlc_hw_info_t *wlc_hw, bool clk)
 {
 	if (ON == clk)
 		si_core_cflags(wlc_hw->sih, SICF_MPCLKE, SICF_MPCLKE);
@@ -2019,7 +2019,7 @@ void wlc_bmac_macphyclk_set(wlc_hw_info_t * wlc_hw, bool clk)
 		si_core_cflags(wlc_hw->sih, SICF_MPCLKE, 0);
 }
 
-void wlc_bmac_phy_reset(wlc_hw_info_t * wlc_hw)
+void wlc_bmac_phy_reset(wlc_hw_info_t *wlc_hw)
 {
 	wlc_phy_t *pih = wlc_hw->band->pi;
 	uint32 phy_bw_clkbits;
@@ -2063,7 +2063,7 @@ void wlc_bmac_phy_reset(wlc_hw_info_t * wlc_hw)
 
 /* switch to and initialize new band */
 static void
-WLBANDINITFN(wlc_bmac_setband) (wlc_hw_info_t * wlc_hw, uint bandunit,
+WLBANDINITFN(wlc_bmac_setband) (wlc_hw_info_t *wlc_hw, uint bandunit,
 				chanspec_t chanspec) {
 	wlc_info_t *wlc = wlc_hw->wlc;
 	uint32 macintmask;
@@ -2105,7 +2105,7 @@ WLBANDINITFN(wlc_bmac_setband) (wlc_hw_info_t * wlc_hw, uint bandunit,
 }
 
 /* low-level band switch utility routine */
-void WLBANDINITFN(wlc_setxband) (wlc_hw_info_t * wlc_hw, uint bandunit) {
+void WLBANDINITFN(wlc_setxband) (wlc_hw_info_t *wlc_hw, uint bandunit) {
 	WL_TRACE(("wl%d: wlc_setxband: bandunit %d\n", wlc_hw->unit, bandunit));
 
 	wlc_hw->band = wlc_hw->bandstate[bandunit];
@@ -2120,7 +2120,7 @@ void WLBANDINITFN(wlc_setxband) (wlc_hw_info_t * wlc_hw, uint bandunit) {
 	}
 }
 
-static bool BCMATTACHFN(wlc_isgoodchip) (wlc_hw_info_t * wlc_hw) {
+static bool BCMATTACHFN(wlc_isgoodchip) (wlc_hw_info_t *wlc_hw) {
 
 	/* reject unsupported corerev */
 	if (!VALID_COREREV(wlc_hw->corerev)) {
@@ -2131,7 +2131,7 @@ static bool BCMATTACHFN(wlc_isgoodchip) (wlc_hw_info_t * wlc_hw) {
 	return TRUE;
 }
 
-static bool BCMATTACHFN(wlc_validboardtype) (wlc_hw_info_t * wlc_hw) {
+static bool BCMATTACHFN(wlc_validboardtype) (wlc_hw_info_t *wlc_hw) {
 	bool goodboard = TRUE;
 	uint boardrev = wlc_hw->boardrev;
 
@@ -2154,7 +2154,7 @@ static bool BCMATTACHFN(wlc_validboardtype) (wlc_hw_info_t * wlc_hw) {
 	return goodboard;
 }
 
-static char *BCMINITFN(wlc_get_macaddr) (wlc_hw_info_t * wlc_hw) {
+static char *BCMINITFN(wlc_get_macaddr) (wlc_hw_info_t *wlc_hw) {
 	const char *varname = "macaddr";
 	char *macaddr;
 
@@ -2180,7 +2180,7 @@ static char *BCMINITFN(wlc_get_macaddr) (wlc_hw_info_t * wlc_hw) {
  * this function could be called when driver is down and w/o clock
  * it operates on different registers depending on corerev and boardflag.
  */
-bool wlc_bmac_radio_read_hwdisabled(wlc_hw_info_t * wlc_hw)
+bool wlc_bmac_radio_read_hwdisabled(wlc_hw_info_t *wlc_hw)
 {
 	bool v, clk, xtal;
 	uint32 resetbits = 0, flags = 0;
@@ -2226,7 +2226,7 @@ bool wlc_bmac_radio_read_hwdisabled(wlc_hw_info_t * wlc_hw)
 }
 
 /* Initialize just the hardware when coming out of POR or S3/S5 system states */
-void BCMINITFN(wlc_bmac_hw_up) (wlc_hw_info_t * wlc_hw) {
+void BCMINITFN(wlc_bmac_hw_up) (wlc_hw_info_t *wlc_hw) {
 	if (wlc_hw->wlc->pub->hw_up)
 		return;
 
@@ -2267,7 +2267,7 @@ void BCMINITFN(wlc_bmac_hw_up) (wlc_hw_info_t * wlc_hw) {
 	}
 }
 
-static bool wlc_dma_rxreset(wlc_hw_info_t * wlc_hw, uint fifo)
+static bool wlc_dma_rxreset(wlc_hw_info_t *wlc_hw, uint fifo)
 {
 	hnddma_t *di = wlc_hw->di[fifo];
 	osl_t *osh;
@@ -2300,7 +2300,7 @@ static bool wlc_dma_rxreset(wlc_hw_info_t * wlc_hw, uint fifo)
  *   clear software macintstatus for fresh new start
  * one testing hack wlc_hw->noreset will bypass the d11/phy reset
  */
-void BCMINITFN(wlc_bmac_corereset) (wlc_hw_info_t * wlc_hw, uint32 flags) {
+void BCMINITFN(wlc_bmac_corereset) (wlc_hw_info_t *wlc_hw, uint32 flags) {
 	d11regs_t *regs;
 	uint i;
 	bool fastclk;
@@ -2387,7 +2387,7 @@ void BCMINITFN(wlc_bmac_corereset) (wlc_hw_info_t * wlc_hw, uint32 flags) {
  * txfifo sizes needs to be modified(increased) since the newer cores
  * have more memory.
  */
-static void BCMINITFN(wlc_corerev_fifofixup) (wlc_hw_info_t * wlc_hw) {
+static void BCMINITFN(wlc_corerev_fifofixup) (wlc_hw_info_t *wlc_hw) {
 	d11regs_t *regs = wlc_hw->regs;
 	uint16 fifo_nu;
 	uint16 txfifo_startblk = TXFIFO_START_BLK, txfifo_endblk;
@@ -2446,7 +2446,7 @@ static void BCMINITFN(wlc_corerev_fifofixup) (wlc_hw_info_t * wlc_hw) {
  *   config other core registers
  *   init dma
  */
-static void BCMINITFN(wlc_coreinit) (wlc_info_t * wlc) {
+static void BCMINITFN(wlc_coreinit) (wlc_info_t *wlc) {
 	wlc_hw_info_t *wlc_hw = wlc->hw;
 	d11regs_t *regs;
 	uint32 sflags;
@@ -2656,7 +2656,7 @@ static void BCMINITFN(wlc_coreinit) (wlc_info_t * wlc) {
  *  - 559241 = 0x88889 => tsf_clk_frac_h = 0x8, tsf_clk_frac_l = 0x8889
  */
 
-void wlc_bmac_switch_macfreq(wlc_hw_info_t * wlc_hw, uint8 spurmode)
+void wlc_bmac_switch_macfreq(wlc_hw_info_t *wlc_hw, uint8 spurmode)
 {
 	d11regs_t *regs;
 	osl_t *osh;
@@ -2687,7 +2687,7 @@ void wlc_bmac_switch_macfreq(wlc_hw_info_t * wlc_hw, uint8 spurmode)
 }
 
 /* Initialize GPIOs that are controlled by D11 core */
-static void BCMINITFN(wlc_gpio_init) (wlc_info_t * wlc) {
+static void BCMINITFN(wlc_gpio_init) (wlc_info_t *wlc) {
 	wlc_hw_info_t *wlc_hw = wlc->hw;
 	d11regs_t *regs;
 	uint32 gc, gm;
@@ -2751,7 +2751,7 @@ static void BCMINITFN(wlc_gpio_init) (wlc_info_t * wlc) {
 	si_gpiocontrol(wlc_hw->sih, gm, gc, GPIO_DRV_PRIORITY);
 }
 
-static void BCMATTACHFN(wlc_ucode_download) (wlc_hw_info_t * wlc_hw) {
+static void BCMATTACHFN(wlc_ucode_download) (wlc_hw_info_t *wlc_hw) {
 	wlc_info_t *wlc;
 	wlc = wlc_hw->wlc;
 
@@ -2779,7 +2779,7 @@ static void BCMATTACHFN(wlc_ucode_download) (wlc_hw_info_t * wlc_hw) {
 }
 
 static void
-BCMATTACHFN(wlc_ucode_write) (wlc_hw_info_t * wlc_hw, const uint32 ucode[],
+BCMATTACHFN(wlc_ucode_write) (wlc_hw_info_t *wlc_hw, const uint32 ucode[],
 			      const uint nbytes) {
 	osl_t *osh;
 	d11regs_t *regs = wlc_hw->regs;
@@ -2800,7 +2800,7 @@ BCMATTACHFN(wlc_ucode_write) (wlc_hw_info_t * wlc_hw, const uint32 ucode[],
 		W_REG(osh, &regs->objdata, ucode[i]);
 }
 
-static void wlc_write_inits(wlc_hw_info_t * wlc_hw, const d11init_t * inits)
+static void wlc_write_inits(wlc_hw_info_t *wlc_hw, const d11init_t *inits)
 {
 	int i;
 	osl_t *osh;
@@ -2823,7 +2823,7 @@ static void wlc_write_inits(wlc_hw_info_t * wlc_hw, const d11init_t * inits)
 	}
 }
 
-static void wlc_ucode_txant_set(wlc_hw_info_t * wlc_hw)
+static void wlc_ucode_txant_set(wlc_hw_info_t *wlc_hw)
 {
 	uint16 phyctl;
 	uint16 phytxant = wlc_hw->bmac_phytxant;
@@ -2840,7 +2840,7 @@ static void wlc_ucode_txant_set(wlc_hw_info_t * wlc_hw)
 	wlc_bmac_write_shm(wlc_hw, M_RSP_PCTLWD, phyctl);
 }
 
-void wlc_bmac_txant_set(wlc_hw_info_t * wlc_hw, uint16 phytxant)
+void wlc_bmac_txant_set(wlc_hw_info_t *wlc_hw, uint16 phytxant)
 {
 	/* update sw state */
 	wlc_hw->bmac_phytxant = phytxant;
@@ -2852,12 +2852,12 @@ void wlc_bmac_txant_set(wlc_hw_info_t * wlc_hw, uint16 phytxant)
 
 }
 
-uint16 wlc_bmac_get_txant(wlc_hw_info_t * wlc_hw)
+uint16 wlc_bmac_get_txant(wlc_hw_info_t *wlc_hw)
 {
 	return (uint16) wlc_hw->wlc->stf->txant;
 }
 
-void wlc_bmac_antsel_type_set(wlc_hw_info_t * wlc_hw, uint8 antsel_type)
+void wlc_bmac_antsel_type_set(wlc_hw_info_t *wlc_hw, uint8 antsel_type)
 {
 	wlc_hw->antsel_type = antsel_type;
 
@@ -2865,7 +2865,7 @@ void wlc_bmac_antsel_type_set(wlc_hw_info_t * wlc_hw, uint8 antsel_type)
 	wlc_phy_antsel_type_set(wlc_hw->band->pi, antsel_type);
 }
 
-void wlc_bmac_fifoerrors(wlc_hw_info_t * wlc_hw)
+void wlc_bmac_fifoerrors(wlc_hw_info_t *wlc_hw)
 {
 	bool fatal = FALSE;
 	uint unit;
@@ -2933,7 +2933,7 @@ void wlc_bmac_fifoerrors(wlc_hw_info_t * wlc_hw)
 	}
 }
 
-void wlc_intrson(wlc_info_t * wlc)
+void wlc_intrson(wlc_info_t *wlc)
 {
 	wlc_hw_info_t *wlc_hw = wlc->hw;
 	ASSERT(wlc->defmacintmask);
@@ -2946,7 +2946,7 @@ void wlc_intrson(wlc_info_t * wlc)
  *  but also because per-port code may require sync with valid interrupt.
  */
 
-static uint32 wlc_wlintrsoff(wlc_info_t * wlc)
+static uint32 wlc_wlintrsoff(wlc_info_t *wlc)
 {
 	if (!wlc->hw->up)
 		return 0;
@@ -2954,7 +2954,7 @@ static uint32 wlc_wlintrsoff(wlc_info_t * wlc)
 	return wl_intrsoff(wlc->wl);
 }
 
-static void wlc_wlintrsrestore(wlc_info_t * wlc, uint32 macintmask)
+static void wlc_wlintrsrestore(wlc_info_t *wlc, uint32 macintmask)
 {
 	if (!wlc->hw->up)
 		return;
@@ -2962,7 +2962,7 @@ static void wlc_wlintrsrestore(wlc_info_t * wlc, uint32 macintmask)
 	wl_intrsrestore(wlc->wl, macintmask);
 }
 
-uint32 wlc_intrsoff(wlc_info_t * wlc)
+uint32 wlc_intrsoff(wlc_info_t *wlc)
 {
 	wlc_hw_info_t *wlc_hw = wlc->hw;
 	uint32 macintmask;
@@ -2981,7 +2981,7 @@ uint32 wlc_intrsoff(wlc_info_t * wlc)
 	return (wlc->macintstatus ? 0 : macintmask);
 }
 
-void wlc_intrsrestore(wlc_info_t * wlc, uint32 macintmask)
+void wlc_intrsrestore(wlc_info_t *wlc, uint32 macintmask)
 {
 	wlc_hw_info_t *wlc_hw = wlc->hw;
 	if (!wlc_hw->clk)
@@ -2991,7 +2991,7 @@ void wlc_intrsrestore(wlc_info_t * wlc, uint32 macintmask)
 	W_REG(wlc_hw->osh, &wlc_hw->regs->macintmask, wlc->macintmask);
 }
 
-void wlc_bmac_mute(wlc_hw_info_t * wlc_hw, bool on, mbool flags)
+void wlc_bmac_mute(wlc_hw_info_t *wlc_hw, bool on, mbool flags)
 {
 	struct ether_addr null_ether_addr = { {0, 0, 0, 0, 0, 0} };
 
@@ -3027,12 +3027,12 @@ void wlc_bmac_mute(wlc_hw_info_t * wlc_hw, bool on, mbool flags)
 		wlc_ucode_mute_override_clear(wlc_hw);
 }
 
-void wlc_bmac_set_deaf(wlc_hw_info_t * wlc_hw, bool user_flag)
+void wlc_bmac_set_deaf(wlc_hw_info_t *wlc_hw, bool user_flag)
 {
 	wlc_phy_set_deaf(wlc_hw->band->pi, user_flag);
 }
 
-int wlc_bmac_xmtfifo_sz_get(wlc_hw_info_t * wlc_hw, uint fifo, uint * blocks)
+int wlc_bmac_xmtfifo_sz_get(wlc_hw_info_t *wlc_hw, uint fifo, uint *blocks)
 {
 	if (fifo >= NFIFO)
 		return BCME_RANGE;
@@ -3042,7 +3042,7 @@ int wlc_bmac_xmtfifo_sz_get(wlc_hw_info_t * wlc_hw, uint fifo, uint * blocks)
 	return 0;
 }
 
-int wlc_bmac_xmtfifo_sz_set(wlc_hw_info_t * wlc_hw, uint fifo, uint blocks)
+int wlc_bmac_xmtfifo_sz_set(wlc_hw_info_t *wlc_hw, uint fifo, uint blocks)
 {
 	if (fifo >= NFIFO || blocks > 299)
 		return BCME_RANGE;
@@ -3062,7 +3062,7 @@ int wlc_bmac_xmtfifo_sz_set(wlc_hw_info_t * wlc_hw, uint fifo, uint blocks)
  * be pulling data into a tx fifo, by the time the MAC acks the suspend
  * request.
  */
-bool wlc_bmac_tx_fifo_suspended(wlc_hw_info_t * wlc_hw, uint tx_fifo)
+bool wlc_bmac_tx_fifo_suspended(wlc_hw_info_t *wlc_hw, uint tx_fifo)
 {
 	/* check that a suspend has been requested and is no longer pending */
 
@@ -3081,7 +3081,7 @@ bool wlc_bmac_tx_fifo_suspended(wlc_hw_info_t * wlc_hw, uint tx_fifo)
 	return FALSE;
 }
 
-void wlc_bmac_tx_fifo_suspend(wlc_hw_info_t * wlc_hw, uint tx_fifo)
+void wlc_bmac_tx_fifo_suspend(wlc_hw_info_t *wlc_hw, uint tx_fifo)
 {
 	uint8 fifo = 1 << tx_fifo;
 
@@ -3112,7 +3112,7 @@ void wlc_bmac_tx_fifo_suspend(wlc_hw_info_t * wlc_hw, uint tx_fifo)
 	}
 }
 
-void wlc_bmac_tx_fifo_resume(wlc_hw_info_t * wlc_hw, uint tx_fifo)
+void wlc_bmac_tx_fifo_resume(wlc_hw_info_t *wlc_hw, uint tx_fifo)
 {
 	/* BMAC_NOTE: WLC_TX_FIFO_ENAB is done in wlc_dpc() for DMA case but need to be done
 	 * here for PIO otherwise the watchdog will catch the inconsistency and fire
@@ -3140,7 +3140,7 @@ void wlc_bmac_tx_fifo_resume(wlc_hw_info_t * wlc_hw, uint tx_fifo)
  *   0 if the interrupt is not for us, or we are in some special cases;
  *   device interrupt status bits otherwise.
  */
-static INLINE uint32 wlc_intstatus(wlc_info_t * wlc, bool in_isr)
+static INLINE uint32 wlc_intstatus(wlc_info_t *wlc, bool in_isr)
 {
 	wlc_hw_info_t *wlc_hw = wlc->hw;
 	d11regs_t *regs = wlc_hw->regs;
@@ -3232,7 +3232,7 @@ static INLINE uint32 wlc_intstatus(wlc_info_t * wlc, bool in_isr)
 
 /* Update wlc->macintstatus and wlc->intstatus[]. */
 /* Return TRUE if they are updated successfully. FALSE otherwise */
-bool wlc_intrsupd(wlc_info_t * wlc)
+bool wlc_intrsupd(wlc_info_t *wlc)
 {
 	uint32 macintstatus;
 
@@ -3257,7 +3257,7 @@ bool wlc_intrsupd(wlc_info_t * wlc)
  * *wantdpc will be set to TRUE if further wlc_dpc() processing is required,
  * FALSE otherwise.
  */
-bool BCMFASTPATH wlc_isr(wlc_info_t * wlc, bool * wantdpc)
+bool BCMFASTPATH wlc_isr(wlc_info_t *wlc, bool *wantdpc)
 {
 	wlc_hw_info_t *wlc_hw = wlc->hw;
 	uint32 macintstatus;
@@ -3288,7 +3288,7 @@ bool BCMFASTPATH wlc_isr(wlc_info_t * wlc, bool * wantdpc)
 }
 
 /* process tx completion events for corerev < 5 */
-static bool wlc_bmac_txstatus_corerev4(wlc_hw_info_t * wlc_hw)
+static bool wlc_bmac_txstatus_corerev4(wlc_hw_info_t *wlc_hw)
 {
 	void *status_p;
 	tx_status_t *txs;
@@ -3324,7 +3324,7 @@ static bool wlc_bmac_txstatus_corerev4(wlc_hw_info_t * wlc_hw)
 }
 
 static bool BCMFASTPATH
-wlc_bmac_dotxstatus(wlc_hw_info_t * wlc_hw, tx_status_t * txs, uint32 s2)
+wlc_bmac_dotxstatus(wlc_hw_info_t *wlc_hw, tx_status_t *txs, uint32 s2)
 {
 	/* discard intermediate indications for ucode with one legitimate case:
 	 *   e.g. if "useRTS" is set. ucode did a successful rts/cts exchange, but the subsequent
@@ -3343,7 +3343,7 @@ wlc_bmac_dotxstatus(wlc_hw_info_t * wlc_hw, tx_status_t * txs, uint32 s2)
  * Return TRUE if more tx status need to be processed. FALSE otherwise.
  */
 static bool BCMFASTPATH
-wlc_bmac_txstatus(wlc_hw_info_t * wlc_hw, bool bound, bool * fatal)
+wlc_bmac_txstatus(wlc_hw_info_t *wlc_hw, bool bound, bool *fatal)
 {
 	bool morepending = FALSE;
 	wlc_info_t *wlc = wlc_hw->wlc;
@@ -3407,7 +3407,7 @@ wlc_bmac_txstatus(wlc_hw_info_t * wlc_hw, bool bound, bool * fatal)
 	return morepending;
 }
 
-void wlc_suspend_mac_and_wait(wlc_info_t * wlc)
+void wlc_suspend_mac_and_wait(wlc_info_t *wlc)
 {
 	wlc_hw_info_t *wlc_hw = wlc->hw;
 	d11regs_t *regs = wlc_hw->regs;
@@ -3471,7 +3471,7 @@ void wlc_suspend_mac_and_wait(wlc_info_t * wlc)
 	ASSERT(!(mc & MCTL_EN_MAC));
 }
 
-void wlc_enable_mac(wlc_info_t * wlc)
+void wlc_enable_mac(wlc_info_t *wlc)
 {
 	wlc_hw_info_t *wlc_hw = wlc->hw;
 	d11regs_t *regs = wlc_hw->regs;
@@ -3510,7 +3510,7 @@ void wlc_enable_mac(wlc_info_t * wlc)
 	wlc_ucode_wake_override_clear(wlc_hw, WLC_WAKE_OVERRIDE_MACSUSPEND);
 }
 
-void wlc_bmac_ifsctl_edcrs_set(wlc_hw_info_t * wlc_hw, bool abie, bool isht)
+void wlc_bmac_ifsctl_edcrs_set(wlc_hw_info_t *wlc_hw, bool abie, bool isht)
 {
 	if (!(WLCISNPHY(wlc_hw->band) && (D11REV_GE(wlc_hw->corerev, 16))))
 		return;
@@ -3546,7 +3546,7 @@ void wlc_bmac_ifsctl_edcrs_set(wlc_hw_info_t * wlc_hw, bool abie, bool isht)
 	}
 }
 
-static void wlc_upd_ofdm_pctl1_table(wlc_hw_info_t * wlc_hw)
+static void wlc_upd_ofdm_pctl1_table(wlc_hw_info_t *wlc_hw)
 {
 	uint8 rate;
 	uint8 rates[8] = {
@@ -3580,7 +3580,7 @@ static void wlc_upd_ofdm_pctl1_table(wlc_hw_info_t * wlc_hw)
 	}
 }
 
-static uint16 wlc_bmac_ofdm_ratetable_offset(wlc_hw_info_t * wlc_hw, uint8 rate)
+static uint16 wlc_bmac_ofdm_ratetable_offset(wlc_hw_info_t *wlc_hw, uint8 rate)
 {
 	uint i;
 	uint8 plcp_rate = 0;
@@ -3613,7 +3613,7 @@ static uint16 wlc_bmac_ofdm_ratetable_offset(wlc_hw_info_t * wlc_hw, uint8 rate)
 	return (2 * wlc_bmac_read_shm(wlc_hw, M_RT_DIRMAP_A + (plcp_rate * 2)));
 }
 
-void wlc_bmac_band_stf_ss_set(wlc_hw_info_t * wlc_hw, uint8 stf_mode)
+void wlc_bmac_band_stf_ss_set(wlc_hw_info_t *wlc_hw, uint8 stf_mode)
 {
 	wlc_hw->hw_stf_ss_opmode = stf_mode;
 
@@ -3622,8 +3622,8 @@ void wlc_bmac_band_stf_ss_set(wlc_hw_info_t * wlc_hw, uint8 stf_mode)
 }
 
 void BCMFASTPATH
-wlc_bmac_read_tsf(wlc_hw_info_t * wlc_hw, uint32 * tsf_l_ptr,
-		  uint32 * tsf_h_ptr)
+wlc_bmac_read_tsf(wlc_hw_info_t *wlc_hw, uint32 *tsf_l_ptr,
+		  uint32 *tsf_h_ptr)
 {
 	d11regs_t *regs = wlc_hw->regs;
 
@@ -3634,7 +3634,7 @@ wlc_bmac_read_tsf(wlc_hw_info_t * wlc_hw, uint32 * tsf_l_ptr,
 	return;
 }
 
-bool BCMATTACHFN(wlc_bmac_validate_chip_access) (wlc_hw_info_t * wlc_hw) {
+bool BCMATTACHFN(wlc_bmac_validate_chip_access) (wlc_hw_info_t *wlc_hw) {
 	d11regs_t *regs;
 	uint32 w, val;
 	volatile uint16 *reg16;
@@ -3728,7 +3728,7 @@ bool BCMATTACHFN(wlc_bmac_validate_chip_access) (wlc_hw_info_t * wlc_hw) {
 
 #define PHYPLL_WAIT_US	100000
 
-void wlc_bmac_core_phypll_ctl(wlc_hw_info_t * wlc_hw, bool on)
+void wlc_bmac_core_phypll_ctl(wlc_hw_info_t *wlc_hw, bool on)
 {
 	d11regs_t *regs;
 	osl_t *osh;
@@ -3787,7 +3787,7 @@ void wlc_bmac_core_phypll_ctl(wlc_hw_info_t * wlc_hw, bool on)
 	}
 }
 
-void wlc_coredisable(wlc_hw_info_t * wlc_hw)
+void wlc_coredisable(wlc_hw_info_t *wlc_hw)
 {
 	bool dev_gone;
 
@@ -3827,7 +3827,7 @@ void wlc_coredisable(wlc_hw_info_t * wlc_hw)
 }
 
 /* power both the pll and external oscillator on/off */
-void wlc_bmac_xtal(wlc_hw_info_t * wlc_hw, bool want)
+void wlc_bmac_xtal(wlc_hw_info_t *wlc_hw, bool want)
 {
 	WL_TRACE(("wl%d: wlc_bmac_xtal: want %d\n", wlc_hw->unit, want));
 
@@ -3846,7 +3846,7 @@ void wlc_bmac_xtal(wlc_hw_info_t * wlc_hw, bool want)
 	}
 }
 
-static void wlc_flushqueues(wlc_info_t * wlc)
+static void wlc_flushqueues(wlc_info_t *wlc)
 {
 	wlc_hw_info_t *wlc_hw = wlc->hw;
 	uint i;
@@ -3868,12 +3868,12 @@ static void wlc_flushqueues(wlc_info_t * wlc)
 		dma_rxreclaim(wlc_hw->di[RX_TXSTATUS_FIFO]);
 }
 
-uint16 wlc_bmac_read_shm(wlc_hw_info_t * wlc_hw, uint offset)
+uint16 wlc_bmac_read_shm(wlc_hw_info_t *wlc_hw, uint offset)
 {
 	return wlc_bmac_read_objmem(wlc_hw, offset, OBJADDR_SHM_SEL);
 }
 
-void wlc_bmac_write_shm(wlc_hw_info_t * wlc_hw, uint offset, uint16 v)
+void wlc_bmac_write_shm(wlc_hw_info_t *wlc_hw, uint offset, uint16 v)
 {
 	wlc_bmac_write_objmem(wlc_hw, offset, v, OBJADDR_SHM_SEL);
 }
@@ -3882,7 +3882,7 @@ void wlc_bmac_write_shm(wlc_hw_info_t * wlc_hw, uint offset, uint16 v)
  * SHM 'offset' needs to be an even address and
  * Buffer length 'len' must be an even number of bytes
  */
-void wlc_bmac_set_shm(wlc_hw_info_t * wlc_hw, uint offset, uint16 v, int len)
+void wlc_bmac_set_shm(wlc_hw_info_t *wlc_hw, uint offset, uint16 v, int len)
 {
 	int i;
 
@@ -3899,7 +3899,7 @@ void wlc_bmac_set_shm(wlc_hw_info_t * wlc_hw, uint offset, uint16 v, int len)
 }
 
 static uint16
-wlc_bmac_read_objmem(wlc_hw_info_t * wlc_hw, uint offset, uint32 sel)
+wlc_bmac_read_objmem(wlc_hw_info_t *wlc_hw, uint offset, uint32 sel)
 {
 	d11regs_t *regs = wlc_hw->regs;
 	volatile uint16 *objdata_lo =
@@ -3921,7 +3921,7 @@ wlc_bmac_read_objmem(wlc_hw_info_t * wlc_hw, uint offset, uint32 sel)
 }
 
 static void
-wlc_bmac_write_objmem(wlc_hw_info_t * wlc_hw, uint offset, uint16 v, uint32 sel)
+wlc_bmac_write_objmem(wlc_hw_info_t *wlc_hw, uint offset, uint16 v, uint32 sel)
 {
 	d11regs_t *regs = wlc_hw->regs;
 	volatile uint16 *objdata_lo =
@@ -3945,7 +3945,7 @@ wlc_bmac_write_objmem(wlc_hw_info_t * wlc_hw, uint offset, uint16 v, uint32 sel)
  * 'sel' selects the type of memory
  */
 void
-wlc_bmac_copyto_objmem(wlc_hw_info_t * wlc_hw, uint offset, const void *buf,
+wlc_bmac_copyto_objmem(wlc_hw_info_t *wlc_hw, uint offset, const void *buf,
 		       int len, uint32 sel)
 {
 	uint16 v;
@@ -3971,7 +3971,7 @@ wlc_bmac_copyto_objmem(wlc_hw_info_t * wlc_hw, uint offset, const void *buf,
  * 'sel' selects the type of memory
  */
 void
-wlc_bmac_copyfrom_objmem(wlc_hw_info_t * wlc_hw, uint offset, void *buf,
+wlc_bmac_copyfrom_objmem(wlc_hw_info_t *wlc_hw, uint offset, void *buf,
 			 int len, uint32 sel)
 {
 	uint16 v;
@@ -3992,7 +3992,7 @@ wlc_bmac_copyfrom_objmem(wlc_hw_info_t * wlc_hw, uint offset, void *buf,
 	}
 }
 
-void wlc_bmac_copyfrom_vars(wlc_hw_info_t * wlc_hw, char **buf, uint * len)
+void wlc_bmac_copyfrom_vars(wlc_hw_info_t *wlc_hw, char **buf, uint *len)
 {
 	WL_TRACE(("wlc_bmac_copyfrom_vars, nvram vars totlen=%d\n",
 		  wlc_hw->vars_size));
@@ -4001,7 +4001,7 @@ void wlc_bmac_copyfrom_vars(wlc_hw_info_t * wlc_hw, char **buf, uint * len)
 	*len = wlc_hw->vars_size;
 }
 
-void wlc_bmac_retrylimit_upd(wlc_hw_info_t * wlc_hw, uint16 SRL, uint16 LRL)
+void wlc_bmac_retrylimit_upd(wlc_hw_info_t *wlc_hw, uint16 SRL, uint16 LRL)
 {
 	wlc_hw->SRL = SRL;
 	wlc_hw->LRL = LRL;
@@ -4019,17 +4019,17 @@ void wlc_bmac_retrylimit_upd(wlc_hw_info_t * wlc_hw, uint16 SRL, uint16 LRL)
 	}
 }
 
-void wlc_bmac_set_noreset(wlc_hw_info_t * wlc_hw, bool noreset_flag)
+void wlc_bmac_set_noreset(wlc_hw_info_t *wlc_hw, bool noreset_flag)
 {
 	wlc_hw->noreset = noreset_flag;
 }
 
-void wlc_bmac_set_ucode_loaded(wlc_hw_info_t * wlc_hw, bool ucode_loaded)
+void wlc_bmac_set_ucode_loaded(wlc_hw_info_t *wlc_hw, bool ucode_loaded)
 {
 	wlc_hw->ucode_loaded = ucode_loaded;
 }
 
-void wlc_bmac_pllreq(wlc_hw_info_t * wlc_hw, bool set, mbool req_bit)
+void wlc_bmac_pllreq(wlc_hw_info_t *wlc_hw, bool set, mbool req_bit)
 {
 	ASSERT(req_bit);
 
@@ -4060,7 +4060,7 @@ void wlc_bmac_pllreq(wlc_hw_info_t * wlc_hw, bool set, mbool req_bit)
 	return;
 }
 
-void wlc_bmac_set_clk(wlc_hw_info_t * wlc_hw, bool on)
+void wlc_bmac_set_clk(wlc_hw_info_t *wlc_hw, bool on)
 {
 	if (on) {
 		/* power up pll and oscillator */
@@ -4082,7 +4082,7 @@ void wlc_bmac_set_clk(wlc_hw_info_t * wlc_hw, bool on)
 }
 
 /* this will be true for all ai chips */
-bool wlc_bmac_taclear(wlc_hw_info_t * wlc_hw, bool ta_ok)
+bool wlc_bmac_taclear(wlc_hw_info_t *wlc_hw, bool ta_ok)
 {
 	return TRUE;
 }
@@ -4090,7 +4090,7 @@ bool wlc_bmac_taclear(wlc_hw_info_t * wlc_hw, bool ta_ok)
 /* Lower down relevant GPIOs like LED when going down w/o
  * doing PCI config cycles or touching interrupts
  */
-void wlc_gpio_fast_deinit(wlc_hw_info_t * wlc_hw)
+void wlc_gpio_fast_deinit(wlc_hw_info_t *wlc_hw)
 {
 	if ((wlc_hw == NULL) || (wlc_hw->sih == NULL))
 		return;
@@ -4108,7 +4108,7 @@ void wlc_gpio_fast_deinit(wlc_hw_info_t * wlc_hw)
 	return;
 }
 
-bool wlc_bmac_radio_hw(wlc_hw_info_t * wlc_hw, bool enable)
+bool wlc_bmac_radio_hw(wlc_hw_info_t *wlc_hw, bool enable)
 {
 	/* Do not access Phy registers if core is not up */
 	if (si_iscoreup(wlc_hw->sih) == FALSE)
@@ -4143,7 +4143,7 @@ bool wlc_bmac_radio_hw(wlc_hw_info_t * wlc_hw, bool enable)
 	return TRUE;
 }
 
-uint16 wlc_bmac_rate_shm_offset(wlc_hw_info_t * wlc_hw, uint8 rate)
+uint16 wlc_bmac_rate_shm_offset(wlc_hw_info_t *wlc_hw, uint8 rate)
 {
 	uint16 table_ptr;
 	uint8 phy_rate, index;
@@ -4167,12 +4167,12 @@ uint16 wlc_bmac_rate_shm_offset(wlc_hw_info_t * wlc_hw, uint8 rate)
 	return (2 * wlc_bmac_read_shm(wlc_hw, table_ptr + (index * 2)));
 }
 
-void wlc_bmac_set_txpwr_percent(wlc_hw_info_t * wlc_hw, uint8 val)
+void wlc_bmac_set_txpwr_percent(wlc_hw_info_t *wlc_hw, uint8 val)
 {
 	wlc_phy_txpwr_percent_set(wlc_hw->band->pi, val);
 }
 
-void wlc_bmac_antsel_set(wlc_hw_info_t * wlc_hw, uint32 antsel_avail)
+void wlc_bmac_antsel_set(wlc_hw_info_t *wlc_hw, uint32 antsel_avail)
 {
 	wlc_hw->antsel_avail = antsel_avail;
 }