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authorGeert Uytterhoeven <geert+renesas@linux-m68k.org>2014-01-24 09:44:00 +0100
committerMark Brown <broonie@linaro.org>2014-01-27 20:07:38 +0000
commit06a7a3cff042a36fb7e6af71039a17c6d1a6d90f (patch)
tree0d6e503c01cad01f65576e15c2b9ba7782776277 /drivers/spi
parent862d357f84f009fdcba22be8d6a2f82ff80ab740 (diff)
downloadop-kernel-dev-06a7a3cff042a36fb7e6af71039a17c6d1a6d90f.zip
op-kernel-dev-06a7a3cff042a36fb7e6af71039a17c6d1a6d90f.tar.gz
spi: rspi: Add support for loopback mode
Add support for specifying loopback mode. Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org> Signed-off-by: Mark Brown <broonie@linaro.org>
Diffstat (limited to 'drivers/spi')
-rw-r--r--drivers/spi/spi-rspi.c22
1 files changed, 14 insertions, 8 deletions
diff --git a/drivers/spi/spi-rspi.c b/drivers/spi/spi-rspi.c
index 0c75569..28db877 100644
--- a/drivers/spi/spi-rspi.c
+++ b/drivers/spi/spi-rspi.c
@@ -183,8 +183,9 @@ struct rspi_data {
struct spi_master *master;
wait_queue_head_t wait;
struct clk *clk;
- u8 spsr;
u16 spcmd;
+ u8 spsr;
+ u8 sppcr;
int rx_irq, tx_irq;
const struct spi_ops *ops;
@@ -252,8 +253,8 @@ static int rspi_set_config_register(struct rspi_data *rspi, int access_size)
{
int spbr;
- /* Sets output mode(CMOS) and MOSI signal(from previous transfer) */
- rspi_write8(rspi, 0x00, RSPI_SPPCR);
+ /* Sets output mode, MOSI signal, and (optionally) loopback */
+ rspi_write8(rspi, rspi->sppcr, RSPI_SPPCR);
/* Sets transfer bit rate */
spbr = clk_get_rate(rspi->clk) / (2 * rspi->max_speed_hz) - 1;
@@ -288,8 +289,8 @@ static int rspi_rz_set_config_register(struct rspi_data *rspi, int access_size)
{
int spbr;
- /* Sets output mode */
- rspi_write8(rspi, 0x00, RSPI_SPPCR);
+ /* Sets output mode, MOSI signal, and (optionally) loopback */
+ rspi_write8(rspi, rspi->sppcr, RSPI_SPPCR);
/* Sets transfer bit rate */
spbr = clk_get_rate(rspi->clk) / (2 * rspi->max_speed_hz) - 1;
@@ -322,8 +323,8 @@ static int qspi_set_config_register(struct rspi_data *rspi, int access_size)
u16 spcmd;
int spbr;
- /* Sets output mode(CMOS) and MOSI signal(from previous transfer) */
- rspi_write8(rspi, 0x00, RSPI_SPPCR);
+ /* Sets output mode, MOSI signal, and (optionally) loopback */
+ rspi_write8(rspi, rspi->sppcr, RSPI_SPPCR);
/* Sets transfer bit rate */
spbr = clk_get_rate(rspi->clk) / (2 * rspi->max_speed_hz);
@@ -829,6 +830,11 @@ static int rspi_setup(struct spi_device *spi)
if (spi->mode & SPI_CPHA)
rspi->spcmd |= SPCMD_CPHA;
+ /* CMOS output mode and MOSI signal from previous transfer */
+ rspi->sppcr = 0;
+ if (spi->mode & SPI_LOOP)
+ rspi->sppcr |= SPPCR_SPLP;
+
set_config_register(rspi, 8);
return 0;
@@ -1050,7 +1056,7 @@ static int rspi_probe(struct platform_device *pdev)
master->cleanup = rspi_cleanup;
master->prepare_message = rspi_prepare_message;
master->unprepare_message = rspi_unprepare_message;
- master->mode_bits = SPI_CPHA | SPI_CPOL;
+ master->mode_bits = SPI_CPHA | SPI_CPOL | SPI_LOOP;
ret = platform_get_irq_byname(pdev, "rx");
if (ret < 0) {
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