diff options
| author | Kyoungil Kim <ki0351.kim@samsung.com> | 2012-05-23 21:29:51 +0900 |
|---|---|---|
| committer | Grant Likely <grant.likely@secretlab.ca> | 2012-12-15 00:49:34 +0000 |
| commit | 7d859ff4937a22aabc0d3f352d1f515fb8b38528 (patch) | |
| tree | 7786b4b67765ba0dbd62527013d15024e7aad451 /drivers/spi | |
| parent | 6f38010d54a9dfd4b9c9e49a7184f84cc2281605 (diff) | |
| download | op-kernel-dev-7d859ff4937a22aabc0d3f352d1f515fb8b38528.zip op-kernel-dev-7d859ff4937a22aabc0d3f352d1f515fb8b38528.tar.gz | |
spi: Change FIFO flush operation and spi channel off
Setting SW_RST does TX/RX FIFO flush.
After FIFO flush, SW_RST should be cleared.
The above setting and clearing SW_RST operation should be done after spi channel off.
Signed-off-by: Kyoungil Kim <ki0351.kim@samsung.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Diffstat (limited to 'drivers/spi')
| -rw-r--r-- | drivers/spi/spi-s3c64xx.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/drivers/spi/spi-s3c64xx.c b/drivers/spi/spi-s3c64xx.c index 88c3f5e..ad93231 100644 --- a/drivers/spi/spi-s3c64xx.c +++ b/drivers/spi/spi-s3c64xx.c @@ -215,6 +215,10 @@ static void flush_fifo(struct s3c64xx_spi_driver_data *sdd) writel(0, regs + S3C64XX_SPI_PACKET_CNT); val = readl(regs + S3C64XX_SPI_CH_CFG); + val &= ~(S3C64XX_SPI_CH_RXCH_ON | S3C64XX_SPI_CH_TXCH_ON); + writel(val, regs + S3C64XX_SPI_CH_CFG); + + val = readl(regs + S3C64XX_SPI_CH_CFG); val |= S3C64XX_SPI_CH_SW_RST; val &= ~S3C64XX_SPI_CH_HS_EN; writel(val, regs + S3C64XX_SPI_CH_CFG); @@ -248,10 +252,6 @@ static void flush_fifo(struct s3c64xx_spi_driver_data *sdd) val = readl(regs + S3C64XX_SPI_MODE_CFG); val &= ~(S3C64XX_SPI_MODE_TXDMA_ON | S3C64XX_SPI_MODE_RXDMA_ON); writel(val, regs + S3C64XX_SPI_MODE_CFG); - - val = readl(regs + S3C64XX_SPI_CH_CFG); - val &= ~(S3C64XX_SPI_CH_RXCH_ON | S3C64XX_SPI_CH_TXCH_ON); - writel(val, regs + S3C64XX_SPI_CH_CFG); } static void s3c64xx_spi_dmacb(void *data) |
