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authorAaron Brice <aaron.brice@datasoft.com>2015-03-30 10:49:15 -0700
committerMark Brown <broonie@kernel.org>2015-03-31 12:13:03 +0100
commit6fd63087d87329a2a84f28d0adec875fd9efb782 (patch)
treec2d173be6b46d751f669d6f5c1f6534dbf35983c /drivers/spi/spi-sirf.c
parentc517d838eb7d07bbe9507871fab3931deccff539 (diff)
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spi: fsl-dspi: Fix clock rate scale values
Previous algorithm had an outer loop with the values {2,3,5,7} and an inner loop with {2,4,6,8,16,32,...,32768}, and would pick the first value over the required scaling value (where the total scale was the two numbers multiplied). Since the inner loop went up to 32768 it would always pick a value of 2 for PBR and a much higher than necessary value for BR. The desired scale factor was being divided by two I believe to compensate for the much higher scale factors (the divide by two not specified in the reference manual). Updated to check all values and find the smallest scale factor possible without going over the desired clock rate. Signed-off-by: Aaron Brice <aaron.brice@datasoft.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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