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authorQipan Li <Qipan.Li@csr.com>2013-06-25 19:45:29 +0800
committerMark Brown <broonie@linaro.org>2013-07-15 11:43:54 +0100
commit94b1f0dfa6dd8a3ed303cc7b0034b17e9cc34824 (patch)
tree9b2786e7cba798c0923976c97820ad3000da273e /drivers/spi/spi-sirf.c
parentad81f0545ef01ea651886dddac4bef6cec930092 (diff)
downloadop-kernel-dev-94b1f0dfa6dd8a3ed303cc7b0034b17e9cc34824.zip
op-kernel-dev-94b1f0dfa6dd8a3ed303cc7b0034b17e9cc34824.tar.gz
spi: sirf: add missed spi mode_bits that SiRFSoC hardware supports
Missing this will cause some user cases fail when they want to change spi transfer mode. Signed-off-by: Qipan Li <Qipan.Li@csr.com> Signed-off-by: Barry Song <Baohua.Song@csr.com> Signed-off-by: Mark Brown <broonie@linaro.org>
Diffstat (limited to 'drivers/spi/spi-sirf.c')
-rw-r--r--drivers/spi/spi-sirf.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/spi/spi-sirf.c b/drivers/spi/spi-sirf.c
index fc20bcf..9608716 100644
--- a/drivers/spi/spi-sirf.c
+++ b/drivers/spi/spi-sirf.c
@@ -538,6 +538,7 @@ static int spi_sirfsoc_probe(struct platform_device *pdev)
sspi->bitbang.txrx_bufs = spi_sirfsoc_transfer;
sspi->bitbang.master->setup = spi_sirfsoc_setup;
master->bus_num = pdev->id;
+ master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_LSB_FIRST | SPI_CS_HIGH;
master->bits_per_word_mask = SPI_BPW_MASK(8) | SPI_BPW_MASK(12) |
SPI_BPW_MASK(16) | SPI_BPW_MASK(32);
sspi->bitbang.master->dev.of_node = pdev->dev.of_node;
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