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authorQipan Li <Qipan.Li@csr.com>2014-04-14 14:29:58 +0800
committerMark Brown <broonie@linaro.org>2014-04-14 21:02:54 +0100
commit625227a4e916fa87f1dd84bde518ef403c3f708a (patch)
tree94b3aba95ede7e32f87668490241ed62836b42cf /drivers/spi/spi-sirf.c
parent818e91625aa17161cd6b39a4d08b77c984f0f485 (diff)
downloadop-kernel-dev-625227a4e916fa87f1dd84bde518ef403c3f708a.zip
op-kernel-dev-625227a4e916fa87f1dd84bde518ef403c3f708a.tar.gz
spi: sirf: set SPI controller in RISC IO chipselect mode
SPI bitbang supply "chipselect" interface for change chip-select line , in the SiRFSoC SPI controller, we need to enable "SPI_CS_IO_MODE", otherwise, spi_sirfsoc_chipselect() has no effect. now the driver is working is because SPI controller will control CS automatically without SPI_CS_IO_MODE. this patch makes the CS controller really controlled by software. Signed-off-by: Qipan Li <Qipan.Li@csr.com> Signed-off-by: Barry Song <Baohua.Song@csr.com> Signed-off-by: Mark Brown <broonie@linaro.org>
Diffstat (limited to 'drivers/spi/spi-sirf.c')
-rw-r--r--drivers/spi/spi-sirf.c5
1 files changed, 5 insertions, 0 deletions
diff --git a/drivers/spi/spi-sirf.c b/drivers/spi/spi-sirf.c
index 51d7c98..9b30743 100644
--- a/drivers/spi/spi-sirf.c
+++ b/drivers/spi/spi-sirf.c
@@ -559,6 +559,11 @@ spi_sirfsoc_setup_transfer(struct spi_device *spi, struct spi_transfer *t)
regval &= ~SIRFSOC_SPI_CMD_MODE;
sspi->tx_by_cmd = false;
}
+ /*
+ * set spi controller in RISC chipselect mode, we are controlling CS by
+ * software BITBANG_CS_ACTIVE and BITBANG_CS_INACTIVE.
+ */
+ regval |= SIRFSOC_SPI_CS_IO_MODE;
writel(regval, sspi->base + SIRFSOC_SPI_CTRL);
if (IS_DMA_VALID(t)) {
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