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authorJohn Rigby <jrigby@freescale.com>2008-01-17 08:37:24 +1100
committerGrant Likely <grant.likely@secretlab.ca>2008-01-21 11:01:32 -0700
commit94f389485e27641348c1951ab8d65157122a8939 (patch)
tree513c59839b466e893b9c8e3db2d6a0df2a8db11b /drivers/serial
parent5b5820d08b8cc90ba0148bf8d4a5a1f792e9e8ba (diff)
downloadop-kernel-dev-94f389485e27641348c1951ab8d65157122a8939.zip
op-kernel-dev-94f389485e27641348c1951ab8d65157122a8939.tar.gz
[POWERPC] Separate MPC52xx PSC FIFO registers from rest of PSC
This is in preparation for the addition of MPC512x PSC support. The main difference in the 512x is in the fifo registers. Signed-off-by: John Rigby <jrigby@freescale.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Diffstat (limited to 'drivers/serial')
-rw-r--r--drivers/serial/mpc52xx_uart.c10
1 files changed, 6 insertions, 4 deletions
diff --git a/drivers/serial/mpc52xx_uart.c b/drivers/serial/mpc52xx_uart.c
index 7e3ba8b..141b8da 100644
--- a/drivers/serial/mpc52xx_uart.c
+++ b/drivers/serial/mpc52xx_uart.c
@@ -112,6 +112,7 @@ static void mpc52xx_uart_of_enumerate(void);
#endif
#define PSC(port) ((struct mpc52xx_psc __iomem *)((port)->membase))
+#define FIFO(port) ((struct mpc52xx_psc_fifo __iomem *)(PSC(port)+1))
/* Forward declaration of the interruption handling routine */
@@ -223,6 +224,7 @@ static int
mpc52xx_uart_startup(struct uart_port *port)
{
struct mpc52xx_psc __iomem *psc = PSC(port);
+ struct mpc52xx_psc_fifo __iomem *fifo = FIFO(port);
int ret;
/* Request IRQ */
@@ -239,10 +241,10 @@ mpc52xx_uart_startup(struct uart_port *port)
out_be16(&psc->mpc52xx_psc_clock_select, 0xdd00); /* /16 prescaler on */
- out_8(&psc->rfcntl, 0x00);
- out_be16(&psc->rfalarm, 0x1ff);
- out_8(&psc->tfcntl, 0x07);
- out_be16(&psc->tfalarm, 0x80);
+ out_8(&fifo->rfcntl, 0x00);
+ out_be16(&fifo->rfalarm, 0x1ff);
+ out_8(&fifo->tfcntl, 0x07);
+ out_be16(&fifo->tfalarm, 0x80);
port->read_status_mask |= MPC52xx_PSC_IMR_RXRDY | MPC52xx_PSC_IMR_TXRDY;
out_be16(&psc->mpc52xx_psc_imr,port->read_status_mask);
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