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authorMark A. Greer <mgreer@mvista.com>2009-04-15 12:40:11 -0700
committerKevin Hilman <khilman@deeprootsystems.com>2009-05-26 08:19:04 -0700
commitf64691b3ab795268072e76ddb89290b6277cdf33 (patch)
treecc8de5ab3c90674905f6d8e141bcf345a81121f4 /drivers/serial/m32r_sio.c
parent673dd36f0d0cf8893d6b46d524ad80e81076b885 (diff)
downloadop-kernel-dev-f64691b3ab795268072e76ddb89290b6277cdf33.zip
op-kernel-dev-f64691b3ab795268072e76ddb89290b6277cdf33.tar.gz
davinci: Add base address and timer flexibility
The davinci timer code currently hardcodes the timer register base addresses, the timer irq numbers, and the timers to use for clock events and clocksource. This won't work for some a new SoC so put those values into the soc_info structure and set them up in the SoC-specific files. Signed-off-by: Mark A. Greer <mgreer@mvista.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Diffstat (limited to 'drivers/serial/m32r_sio.c')
0 files changed, 0 insertions, 0 deletions
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