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| author | John Garry <john.garry@huawei.com> | 2016-04-08 17:23:14 +0800 |
|---|---|---|
| committer | Martin K. Petersen <martin.petersen@oracle.com> | 2016-04-15 16:53:17 -0400 |
| commit | f76a0b49402b39b2d314ced52aac2f02d6a6c45d (patch) | |
| tree | 47bfa77b872562ccb24d63784bb153762754acca /drivers/scsi | |
| parent | 11826e5dc7b7297164dd9dd6d735c6ff6acb4b86 (diff) | |
| download | op-kernel-dev-f76a0b49402b39b2d314ced52aac2f02d6a6c45d.zip op-kernel-dev-f76a0b49402b39b2d314ced52aac2f02d6a6c45d.tar.gz | |
hisi_sas: for v2 hw only set ITCT qw2 for SAS device
This patch fixes the ITCT table setup as it should be configured
differently for SAS and SATA devices. For SATA disks there is no need
to set qw2 (already zeroed). Also, link parameters for Bus inactive
limit, max connection time limit, and reject to open limit timers
parameters are changed to match global config register,
MAX_CON_TIME_LIMIT_TIME, as recommended by hw team.
Signed-off-by: John Garry <john.garry@huawei.com>
Reviewed-by: Zhangfei Gao <zhangfei.gao@linaro.org>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
Diffstat (limited to 'drivers/scsi')
| -rw-r--r-- | drivers/scsi/hisi_sas/hisi_sas_v2_hw.c | 11 |
1 files changed, 6 insertions, 5 deletions
diff --git a/drivers/scsi/hisi_sas/hisi_sas_v2_hw.c b/drivers/scsi/hisi_sas/hisi_sas_v2_hw.c index cc083b9..4276594 100644 --- a/drivers/scsi/hisi_sas/hisi_sas_v2_hw.c +++ b/drivers/scsi/hisi_sas/hisi_sas_v2_hw.c @@ -554,10 +554,11 @@ static void setup_itct_v2_hw(struct hisi_hba *hisi_hba, itct->sas_addr = __swab64(itct->sas_addr); /* qw2 */ - itct->qw2 = cpu_to_le64((500ULL << ITCT_HDR_INLT_OFF) | - (0xff00ULL << ITCT_HDR_BITLT_OFF) | - (0xff00ULL << ITCT_HDR_MCTLT_OFF) | - (0xff00ULL << ITCT_HDR_RTOLT_OFF)); + if (!dev_is_sata(device)) + itct->qw2 = cpu_to_le64((500ULL << ITCT_HDR_INLT_OFF) | + (0x1ULL << ITCT_HDR_BITLT_OFF) | + (0x32ULL << ITCT_HDR_MCTLT_OFF) | + (0x1ULL << ITCT_HDR_RTOLT_OFF)); } static void free_device_v2_hw(struct hisi_hba *hisi_hba, @@ -715,7 +716,7 @@ static void init_reg_v2_hw(struct hisi_hba *hisi_hba) hisi_sas_write32(hisi_hba, HGC_SAS_TX_OPEN_FAIL_RETRY_CTRL, 0x7FF); hisi_sas_write32(hisi_hba, OPENA_WT_CONTI_TIME, 0x1); hisi_sas_write32(hisi_hba, I_T_NEXUS_LOSS_TIME, 0x1F4); - hisi_sas_write32(hisi_hba, MAX_CON_TIME_LIMIT_TIME, 0x4E20); + hisi_sas_write32(hisi_hba, MAX_CON_TIME_LIMIT_TIME, 0x32); hisi_sas_write32(hisi_hba, BUS_INACTIVE_LIMIT_TIME, 0x1); hisi_sas_write32(hisi_hba, CFG_AGING_TIME, 0x1); hisi_sas_write32(hisi_hba, HGC_ERR_STAT_EN, 0x1); |
