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authorKe Wei <kewei@marvell.com>2008-03-27 14:55:23 +0800
committerJames Bottomley <James.Bottomley@HansenPartnership.com>2008-03-28 12:31:54 -0500
commit963829e650516d140e1f2ddaa6c9ba7cce4c2c6a (patch)
tree12a22ce76f97f242a47c5a7676b484b129deece9 /drivers/scsi
parent8121ed420285885654af133a6ca1919590f98917 (diff)
downloadop-kernel-dev-963829e650516d140e1f2ddaa6c9ba7cce4c2c6a.zip
op-kernel-dev-963829e650516d140e1f2ddaa6c9ba7cce4c2c6a.tar.gz
[SCSI] mvsas: fix the buffer of rx DMA overflow bug
fix the buffer of rx DMA overflow bug. fix default queue depth. Signed-off-by: Ke Wei <kewei@marvell.com> Signed-off-by: James Bottomley <James.Bottomley@HansenPartnership.com>
Diffstat (limited to 'drivers/scsi')
-rw-r--r--drivers/scsi/mvsas.c25
1 files changed, 16 insertions, 9 deletions
diff --git a/drivers/scsi/mvsas.c b/drivers/scsi/mvsas.c
index f4f7b0a..761beeb 100644
--- a/drivers/scsi/mvsas.c
+++ b/drivers/scsi/mvsas.c
@@ -2240,7 +2240,7 @@ static void mvs_free(struct mvs_info *mvi)
mvi->rx_fis, mvi->rx_fis_dma);
if (mvi->rx)
dma_free_coherent(&mvi->pdev->dev,
- sizeof(*mvi->rx) * MVS_RX_RING_SZ,
+ sizeof(*mvi->rx) * (MVS_RX_RING_SZ + 1),
mvi->rx, mvi->rx_dma);
if (mvi->slot)
dma_free_coherent(&mvi->pdev->dev,
@@ -2348,6 +2348,9 @@ static struct mvs_info *__devinit mvs_alloc(struct pci_dev *pdev,
return NULL;
spin_lock_init(&mvi->lock);
+#ifdef MVS_USE_TASKLET
+ tasklet_init(&mvi->tasklet, mvs_tasklet, (unsigned long)mvi);
+#endif
mvi->pdev = pdev;
mvi->chip = chip;
@@ -2371,6 +2374,10 @@ static struct mvs_info *__devinit mvs_alloc(struct pci_dev *pdev,
mvs_phy_init(mvi, i);
arr_phy[i] = &mvi->phy[i].sas_phy;
arr_port[i] = &mvi->port[i].sas_port;
+ mvi->port[i].taskfileset = MVS_ID_NOT_MAPPED;
+ mvi->port[i].wide_port_phymap = 0;
+ mvi->port[i].port_attached = 0;
+ INIT_LIST_HEAD(&mvi->port[i].list);
}
SHOST_TO_SAS_HA(mvi->shost) = &mvi->sas;
@@ -2387,9 +2394,10 @@ static struct mvs_info *__devinit mvs_alloc(struct pci_dev *pdev,
mvi->sas.sas_phy = arr_phy;
mvi->sas.sas_port = arr_port;
mvi->sas.num_phys = chip->n_phy;
- mvi->sas.lldd_max_execute_num = MVS_CHIP_SLOT_SZ - 1;
+ mvi->sas.lldd_max_execute_num = 1;
mvi->sas.lldd_queue_size = MVS_QUEUE_SIZE;
- mvi->can_queue = (MVS_CHIP_SLOT_SZ >> 1) - 1;
+ mvi->shost->can_queue = MVS_CAN_QUEUE;
+ mvi->shost->cmd_per_lun = MVS_SLOTS / mvi->sas.num_phys;
mvi->sas.lldd_ha = mvi;
mvi->sas.core.shost = mvi->shost;
@@ -2442,11 +2450,11 @@ static struct mvs_info *__devinit mvs_alloc(struct pci_dev *pdev,
memset(mvi->rx_fis, 0, MVS_RX_FISL_SZ);
mvi->rx = dma_alloc_coherent(&pdev->dev,
- sizeof(*mvi->rx) * MVS_RX_RING_SZ,
+ sizeof(*mvi->rx) * (MVS_RX_RING_SZ + 1),
&mvi->rx_dma, GFP_KERNEL);
if (!mvi->rx)
goto err_out;
- memset(mvi->rx, 0, sizeof(*mvi->rx) * MVS_RX_RING_SZ);
+ memset(mvi->rx, 0, sizeof(*mvi->rx) * (MVS_RX_RING_SZ + 1));
mvi->rx[0] = cpu_to_le32(0xfff);
mvi->rx_cons = 0xfff;
@@ -2596,7 +2604,7 @@ static void __devinit mvs_phy_hacks(struct mvs_info *mvi)
mvs_cw32(regs, CMD_SAS_CTL0, tmp);
/* workaround for WDTIMEOUT , set to 550 ms */
- mvs_cw32(regs, CMD_WD_TIMER, 0xffffff);
+ mvs_cw32(regs, CMD_WD_TIMER, 0x86470);
/* not to halt for different port op during wideport link change */
mvs_cw32(regs, CMD_APP_ERR_CONFIG, 0xffefbf7d);
@@ -2704,17 +2712,16 @@ static u32 mvs_is_phy_ready(struct mvs_info *mvi, int i)
{
u32 tmp;
struct mvs_phy *phy = &mvi->phy[i];
- struct mvs_port *port;
+ struct mvs_port *port = phy->port;;
tmp = mvs_read_phy_ctl(mvi, i);
if ((tmp & PHY_READY_MASK) && !(phy->irq_status & PHYEV_POOF)) {
- if (!phy->port)
+ if (!port)
phy->phy_attached = 1;
return tmp;
}
- port = phy->port;
if (port) {
if (phy->phy_type & PORT_TYPE_SAS) {
port->wide_port_phymap &= ~(1U << i);
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