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authorAlexandre Belloni <alexandre.belloni@free-electrons.com>2014-03-14 15:19:09 +0100
committerThierry Reding <thierry.reding@gmail.com>2014-03-18 20:47:48 +0100
commit916030db4399f9237beef480fee6b11dd83cacd5 (patch)
treef290ef1a4c72a5d6d0c0aea11b43062ddf80cfaf /drivers/pwm
parent8db9e29fe540c9640ea60f37ecf99d3a73bd12c5 (diff)
downloadop-kernel-dev-916030db4399f9237beef480fee6b11dd83cacd5.zip
op-kernel-dev-916030db4399f9237beef480fee6b11dd83cacd5.tar.gz
pwm: atmel: correct CDTY calculation
From the datasheet, the actual duty cycle is: (period - (1 / clk) * CDTY) / period This actually correct the polarity of the PWM and solves the issue that pwm-leds exhibits: when setting a duty cycle of 0 and then disabling a channel, the level was wrong (1 when the polarity was normal and 0 when the polarity was inversed). Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Diffstat (limited to 'drivers/pwm')
-rw-r--r--drivers/pwm/pwm-atmel.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/pwm/pwm-atmel.c b/drivers/pwm/pwm-atmel.c
index 2d69e9c..0adc952 100644
--- a/drivers/pwm/pwm-atmel.c
+++ b/drivers/pwm/pwm-atmel.c
@@ -133,7 +133,7 @@ static int atmel_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm,
prd = div;
div *= duty_ns;
do_div(div, period_ns);
- dty = div;
+ dty = prd - div;
ret = clk_enable(atmel_pwm->clk);
if (ret) {
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